JPS61180449A - Dielectric-isolated semiconductor integrated circuit substrate and manufacture thereof - Google Patents

Abstract

PURPOSE:To reduce lattice defects by a method wherein a porous silicon oxide layer is provided with a Y-shaped cross section. CONSTITUTION:On the surface of a P-type single-crystal silicon substrate 20, an N-type epitaxial layer 21 and mask 23 are formed. Next, the substrate 20 is subjected to etching for the formation of a V-shaped groove. A process follows wherein boron is deposited for the formation of a layer 24 containing a P-type impurity within the epitaxial layer 21, when the layer 24 is provided with a Y-shaped cross section. Anodic treatment is accomplished for the conversion of the layer 24 into a porous silicon layer 26. Next, oxidation is accomplished in an oxygen atmosphere for the development of the porous silicon layer 26 into a silicon dioxide layer 22. The silicon dioxide layer 22 is larger in volume than the porous silicon layer 26, as the result of which the V-shaped groove is filled with silicon dioxide.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a semiconductor integrated circuit substrate using dielectric isolation technology and a method for manufacturing the same, and particularly relates to a substrate using porous silicon oxide.

[Description of prior art]

Conventionally, elements in semiconductor integrated circuits are separated by PN junction separation, but dielectric isolation technology is attracting attention from the viewpoint of breakdown voltage, speed, capacity, etc.

There are various types of dielectric separation, but the most common ones are:
By forming a V-shaped groove using an anisotropic etching jig, forming an oxide film and a polycrystalline silicon layer, and then polishing the original single crystal silicon substrate.

It forms islands of single-crystal silicon separated by an oxide pattern and supported by polycrystalline silicon.

However, in the above type of dielectric isolation.

However, there are problems in terms of man-hours and reliability, and a method of forming an insulating region by using porous silicon and oxidizing it has also been considered. In this method, normally P-type silicon is made porous by anodization treatment, and oxidation treatment is performed by utilizing the fact that porous silicon is active toward oxygen. It is beginning to be used in various fields because it does not require processes such as polishing and is advantageous in terms of yield.

The present invention relates to this type of substrate for dielectrically isolated integrated circuits and a method for manufacturing the same.

[Problems with conventional technology]

However, a problem that arises with dielectric isolation substrates using porous silicon oxide is leakage current. Compared to PN junction isolation, it has deteriorated by two to three orders of magnitude, and the Iym of a lateral PNP transistor built on an isolated island is one order of magnitude smaller.

Lattice defects were observed near the lower diffusion layer when the P-type region formed for anodization treatment was diffused from above and below, and near the surface when diffused only from above. In this way, lattice defects in silicon are a major cause of leakage current.

There are several possible causes of the above lattice defects.

During anodization treatment, the reaction surface is not smooth and the interface between porous silicon and silicon becomes extremely uneven, and during oxidation, porous silicon expands and puts stress on the surrounding silicon. Examples include gettering of lattice defects in silicon as a source.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to solve the above problems and provide a dielectrically isolated integrated circuit substrate that reduces lattice defects and improves leakage current.

Another object of the present invention is to provide a manufacturing method therefor.

[Means for solving problems]

The present invention achieves the above object by changing the structure of porous silicon oxide.

That is, in a dielectrically isolated semiconductor integrated circuit substrate in which island-like regions of single crystal silicon are surrounded and separated by an insulator made of porous silicon oxide in a lattice shape, the width of the porous silicon oxide is equal to the width of the substrate surface. It is characterized by a wide interior. Simply put, the porous silicon oxide has a Y-shaped cross section.

In addition, in order to manufacture such a dielectrically isolated semiconductor integrated circuit substrate, a lattice-like groove with sloped sides is formed on the surface of a single-crystal silicon substrate, and impurities are introduced into the single-crystal silicon substrate from this groove. The silicon is characterized by diffusing impurities, making the region into which the impurity is diffused porous by anodizing, and then oxidizing the porous silicon.

Furthermore, a mask with inclined ends is formed on the surface of the single crystal silicon substrate so that the substrate surface is exposed in a lattice pattern, and impurities are diffused into the single crystal silicon substrate and impurity ions/ions are diffused through a part of the mask. The method is characterized in that a region containing impurities is formed with a wide upper part by implanting silicon, the region containing impurities is anodized to make it porous, and the porous silicon is oxidized.

[Embodiment of the invention-1] An embodiment of the present invention will be described below with reference to one drawing. FIG. 1 shows a front sectional view of one row of a dielectrically isolated semiconductor integrated circuit substrate according to the present invention.

Island regions [1] of single crystal silicon of an N type epitaxial layer are formed on the surface of a P type single crystal silicon substrate 10, separated by a silicon dioxide layer 12 made of porous silicon oxide.

The silicon dioxide layer L2 is formed in a grid pattern on the substrate,
The figure shows only a portion of it.

Therefore, the island region L1 of single crystal silicon is surrounded by the silicon dioxide layer 12.

This silicon dioxide layer 12 has a wider upper portion. In other words, it has a structure in which the width gradually increases from the middle toward the surface. Therefore, the width of the surface portion becomes wider than that of the bottom portion, and the distance between the island-like regions LL of single crystal silicon increases accordingly.

With such a structure in which the surface width is wide, lattice defects near the boundary between the single-crystal silicon island region 1 in the surface portion and the porous silicon oxide silicon dioxide NL 2 are reduced. This is considered to be because the portion where lattice defects are most likely to occur spreads upward, thereby avoiding concentration of stress.

[Implementation Tree 2] Next, a method for manufacturing a dielectrically isolated semiconductor integrated circuit substrate according to the present invention will be described. FIG. 2 (A-E) is a front sectional view of the first row.

An N-type epitaxial layer 2t is formed on the surface of a P-type single crystal silicon substrate 200, and a mask 23 is formed on the surface (A). At this time, the surface of the N-type epitaxial layer 2 is exposed in a lattice pattern. The use of silicon nitride as a mask is advantageous in that it can also be used for subsequent anodization treatment. Further, the surface of the P-type single crystal silicon substrate 20 is
00) N-type epitaxial layer 2L with crystal plane
It is also assumed that the (100) crystal plane.

When a substrate on which a mask is formed as described above is etched, a V-shaped groove is formed due to the anisotropy of the etching. By setting the etching time appropriately, a type 1 groove is formed on the surface of the N-type layer 210 at the opening of the mask (B).

Subsequently, boron is deposited as a P-type impurity through the opening of the mask, and the P-type impurity is diffused into the N-type epitaxial layer. The region 24 containing P-type impurities is formed toward the inside of the substrate, and in the vicinity of the trench, diffusion progresses laterally in an inclined manner along the slope of the trench, resulting in a shape close to a V-shape (C ). The oxide film 25 formed on the surface is removed and the process proceeds to the next step.

Next, anodization treatment is performed in a hydrogen fluoride solution.

The region 24 containing P-type impurities becomes a porous silicon layer 26 (D).

Porous silicon has minute pores formed therein and has the property of being active against oxygen.

Therefore, when the oxidation treatment is performed in an oxygen atmosphere, the porous silicon z6 is rapidly oxidized. and.

This becomes a silicon dioxide layer 22 (E). At this time, the volume also expands, so the initially formed trench is filled with silicon dioxide 22.

In this way, islands of single crystal silicon formed by the N-type epitaxial layer are surrounded and separated by an insulating layer of silicon dioxide.

[Embodiment Row-3] Next, an example of the method for manufacturing a dielectrically isolated semiconductor integrated circuit substrate according to the present invention will be described with reference to FIG.

Note that explanations of parts common to the above example will be omitted.

The N-type epitaxial layer 31 is formed on the P-type single crystal silicon substrate 30 in the same manner as described above, but the crystal plane does not need to be the (100) plane.

A silicon dioxide mask 33 is formed on the surface of the epitaxial layer 310, with the end portions of the mask 33 being inclined (A). As in the previous example, the exposed portion of the epitaxial layer 31 has a lattice shape.

Subsequently, boron is diffused as a P-type impurity into the substrate through the opening of the mask. This forms a P-type region 34 (B).

Next, the same impurity, boron, is implanted into the epitaxial layer 31 by ion implantation. Since the silicon dioxide mask 33 is sloped and has different thicknesses, the sloped portions of the mask 33 are implanted at different depths, so that the P-type region 34 is formed on the surface. (C)
.

Here, the mask 33 is removed and the silicon nitride mask 37 is removed.
After forming, anodization treatment (D) is carried out in the same manner as above.
Perform oxidation treatment (E).

In this way, a dielectrically isolated semiconductor integrated circuit substrate on which a silicon dioxide layer with a wide width on one surface is formed is obtained.

〔Effect of the invention〕

According to the present invention, lattice defects in island-like regions of single crystal silicon can be reduced, and the problem of leakage current can be solved by this K.

It is also advantageous in that the structure of the silicon dioxide layer made of porous silicon oxide can be changed by adding only one step without requiring any complicated processing.

[Brief explanation of drawings]

3, 2, and 3 are front sectional views each showing an embodiment of the present invention. L2, 22, 32... Silicon dioxide layer.

Claims (3)

[Claims] (1) In a dielectrically isolated semiconductor integrated circuit substrate in which island regions of single crystal silicon are surrounded and separated by an insulator made of porous silicon oxide in a lattice shape, the width of the porous silicon oxide is A dielectrically separated semiconductor integrated circuit substrate, characterized in that the surface is wider than the inside of the substrate. (2) Form a lattice-like groove with inclined sides on the surface of a single-crystal silicon substrate, diffuse an impurity into the single-crystal silicon substrate from the groove, and anodize the region where the impurity has been diffused. 2. The method of manufacturing a dielectrically isolated semiconductor integrated circuit substrate according to claim 1, wherein the porous silicon is made porous through treatment, and the porous silicon is made into an insulator by oxidation treatment. (3) Forming a mask on the surface of the single crystal silicon substrate with inclined edges so that the surface of the single crystal silicon substrate is exposed in a lattice pattern, and diffusing impurities into the single crystal silicon substrate and removing the impurities. A region containing the impurity is formed whose upper part is expanded by ion implantation, the region containing the impurity is made porous by anodization treatment, and the porous silicon is oxidized to insulate it. A method for manufacturing a dielectrically isolated semiconductor integrated circuit substrate according to claim 1.