JPS5951745B2 - Manufacturing method of semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device in which a plurality of island regions are insulated and isolated from each other.

In a manufacturing method of a semiconductor device used in an integrated circuit, a method for insulating and isolating each element of an integrated circuit is proposed in a patent application filed in 1972 using porous silicon as described below.
No. 133371.

The same issue describes the process of making the P-type semiconductor layer porous by anodizing a substrate in which an island region is provided through the P-type semiconductor layer on the N-type semiconductor substrate, and converting the porous semiconductor layer into an insulator. Accordingly, a semiconductor device is obtained in which the side and bottom surfaces of the island region are separated by an insulator. FIGS. 1a to 1d show process diagrams for constructing an integrated circuit substrate using the dielectric separation method proposed in the same issue.

First, a P-type silicon layer 2 is formed on an N-type silicon substrate 1 by, for example, epitaxial growth.

Then, an N-type silicon layer 3 is formed on the surface of the P-type silicon layer 2 by, for example, epitaxial growth. Further, a silicon oxide film 4 is formed as a diffusion mask on the surface of the N-type silicon layer 3 by, for example, thermal oxidation, and a diffusion window 5 is opened by well-known photoetching.
). Thereafter, P-type impurities are diffused through the diffusion window 5 by thermal diffusion or ion implantation, and the N-type silicon layer 3 is
A P-type diffusion layer 6 is formed so as to reach the P-type silicon layer 2 across the P-type silicon layer 2 . As a result, the side and bottom surfaces are P-shaped regions 2
, 6 is formed (see figure b).
). Next, the substrate 1 is immersed in an electrolytic solution, such as a hydrogen fluoride oxidation solution, and anodized to make the P-type regions 2 and 6 porous, and porous silicon 8 is formed surrounding the N-type island region 7. (Figure c).

Thereafter, when the substrate 1 is heat-treated in an oxidizing atmosphere, the porous silicon 8 becomes a silicon oxide film 9, thereby forming an integrated circuit substrate having an N-type island region surrounded by the silicon oxide film 9. In the above conventional example, the insulation of the island region is completely isolated, and the thickness of the porous region is limited to the substrate, resulting in good uniformity, which has the advantage that no cracks or clutter occur in the island region. It was hot. However, as semiconductor devices were formed using integrated circuit substrates obtained in the conventional example shown in Figure 1, and in pursuit of higher performance and higher density semiconductor devices, new and previously unimaginable results were discovered. I found out that there are drawbacks. The details are described below. First, the porous structure in the conventional example described above will be briefly described. FIGS. 2a to 2c show the progress of porosity. The substrate formed as shown in FIG. 1b is immersed in a hydrofluoric acid aqueous solution, and the P-N junction between the N-type substrate 1 and the P-type region 2 is inverted as shown in FIG. 2a. When a bias is applied and light L is irradiated from the substrate surface, a photocurrent U is uniformly distributed over the entire surface of the P-N junction. occurs. Porous formation is caused by the photocurrent U
The process starts from a P-type diffusion layer 6 shown in FIG. 1b due to an anodic reaction caused by O, and becomes porous silicon 8. When the porous silicon 8 reaches the N-type substrate 1 as the porosity progresses further,
It then extends laterally below the island area as shown in Figure 2b. At this time, the porosity progresses in the lateral direction of the N-type substrate 1.
A photocurrent U1 generated in the P-N junction between and P-type region 2
In the depth direction, the rate is determined by the photocurrent U2 generated at the potential barrier at the interface between the N-type substrate 1 and the hydrofluoric acid aqueous solution. In the above conventional example, the photocurrents U1 and U
2 is the same current density per unit area, so
The porosity progressed to the inside of the N-type substrate 1, and as shown in FIG. 2b, the thickness of the porous silicon layer 8 under the island region 7 became non-uniform. After further increasing the porosity and forming a porous silicon layer 8 on the entire surface under the island region 7, when the substrate 1 is heat-treated in an oxidizing atmosphere, a porous silicon layer 8 is formed as shown in FIG. 2C. 8 becomes a silicon oxide film 9.

Here, upon oxidation ζ of the porous silicon layer 8, the porous silicon layer 8 contracts, and the island region 7 is bent in an F-shape as shown in FIG. 2C. Therefore, the island region 7 does not have a flat shape as shown in FIG. 1d. Therefore, as conventional semiconductor devices pursue higher performance, carrier mobility within the island region decreases due to local distortion caused by the island region bending into an F-shape. , noise and leakage current caused by defects can no longer be ignored and have become new problems.

In addition, in pursuit of higher density semiconductor devices, in the conventional example, the island region curves in a curved shape and the surface is not flat, making microfabrication by photo etching difficult. The present invention was made in order to solve the above-mentioned conventional problems, and it is possible to make the thickness of the porous silicon layer under the island region uniform after making it porous, It is an object of the present invention to provide a method for manufacturing a semiconductor device in which no strain occurs in the island region during oxidation of a porous silicon layer, and the surface of the island region is flat.

As mentioned above, in the conventional method, the rate of porosity formation is determined by the photocurrents Ul and U2, and the photocurrent U2 causes the porosity to progress in the depth direction, resulting in an uneven thickness of the porous silicon film. It was becoming.

Therefore, by creating an impurity concentration distribution in the substrate and making the impurity concentration of the surrounding substrate sufficiently higher than that of the substrate directly under the central part of the island region, it is possible to make the substrate porous in the depth direction. The present invention was achieved by knowing that the rate-determining photocurrent can be made sufficiently smaller than the photocurrent rate-determining rate of porosity formation in the lateral direction, and that the thickness of the porous silicon layer under the island region can be made uniform. It came to this.

A detailed description will be given below with reference to the drawings.

FIG. 3a shows the structure of a substrate before being anodized to make it porous in one embodiment of the present invention. 10 is an N-type substrate, 11 is a high concentration N+ type region formed in the N-type substrate 10 by thermal diffusion or ion implantation, 12 is a P-type substrate, 1
3 is an N-type region.

A feature of the present invention is that the N-type semiconductor substrate 10 has a high impurity concentration that is sufficiently higher than that of the N-type semiconductor substrate 10 on the surface of the substrate 10 around the N-type island region, leaving just below the central part. An N+ type region 11 is formed.

FIG. 3b shows the state in which the porous treatment is in progress.
In the porous treatment, the substrate is immersed in an electrolytic solution such as a hydrofluoric acid aqueous solution, and the substrate surface is irradiated with light L while applying a bias as shown in FIG. 3B, as in the conventional example. In the same figure, the photocurrent U3 that determines the rate of porosity in the lateral direction is N
This is due to the P-N junction formed between the shaped substrate 10 and the P-type region 12, and the photocurrent U that determines the rate of porosity formation in the depth direction. This is due to the potential barrier formed at the interface between the high concentration N-type region and the hydrofluoric acid aqueous solution. Here the photocurrent U.

,U,. As is well known, photocurrent depends on the volume of a depletion layer formed by applying a bias to a PN junction or a potential barrier. For example, if the impurity density of the N-type substrate 10 is l x 10"゜cm-",
The impurity density of the high concentration N''' type region 11 is 1×10''C
m-', the impurity density of the P-type region 12 is l×10”゜cm
-°, and if the applied voltage for the anodic reaction is 3V, then U3=100mA U.

=1mA.

Therefore, in the above substrate configuration, the photocurrent U that determines the rate of porosity formation in the depth direction is the same as the photocurrent U that determines the rate of porosity formation in the lateral direction. Since it is negligibly small compared to
, porosity hardly progresses in the depth direction,
Proceed laterally. Therefore, it is possible to make the thickness of the porous silicon layer 18 under the island region 17 uniform. Fourth
Figures a to e are process diagrams showing one embodiment of the present invention. First, a photoresist mask, for example, is formed by well-known photoetching on a desired region of the surface of the substrate 10, which is N-type and has an impurity concentration of, for example, 1 x 10''5 cm-3, and then N-type impurities are added to a high concentration by ion implantation. A high concentration N''' type region 11 is formed by ion implantation. High concentration N-shaped region 11
For example, it is formed to have an impurity concentration of 1×10"cm-" (FIG. 1A). Next, a P-type silicon layer 12 having an impurity density of, for example, 1×10” cm-° is formed on the surface by, for example, epitaxial growth, and then the P-type silicon layer 12 is formed by epitaxial growth.
An N-type silicon layer 13 is formed on the surface of the shaped region 12 by, for example, epitaxial growth (FIG. 2b). Thereafter, a silicon oxide film 14 is formed as a diffusion mask on the surface of the N-type silicon layer 13 by, for example, thermal oxidation, and a diffusion window 15 is opened by well-known photoetching.
Diffusion window 15 is formed by thermal diffusion method or ion implantation method.
A P-type impurity diffusion layer 16 is formed by diffusing the P-type impurity from the wafer to cross the N-type silicon layer 13 and reach the P-type silicon layer 12.

As a result, an N-type island region 17 whose side and bottom surfaces are surrounded by P-type regions 12 and 16 is formed (FIG. 3(c)). Next, as explained in FIGS. 3A and 3B, the substrate 10 is immersed in an electrolytic solution, such as a hydrofluoric acid aqueous solution, and subjected to anodization, so that only the P-type regions 12 and 16 are exposed to the porous silicon 18.
Make it.

As described above, since the highly doped N-type region 11 is formed in the substrate 10, porosity hardly progresses into the interior of the substrate 10, and the thickness of the porous silicon layer 18 under the island region are formed uniformly (d in the same figure). Thereafter, when the substrate 10 is further heat-treated in an oxidizing atmosphere, the porous silicon layer 18 becomes a silicon oxide film 19, and an integrated structure having a plurality of N-type island regions 17 whose bottom and side surfaces are separated by a silicon oxide film 19 is formed. The circuit board 10' is formed (
Figure e). Note that when the porous silicon layer 18 is oxidized, the porous silicon layer 18 shrinks as in the conventional example, but in the present invention, the thickness of the porous silicon layer 18 under the island region 17 is Since the island region 17 is formed uniformly, the island region 17 is not bent in a F-shape as shown in the conventional example, and the surface of the island region 17 is formed flat as shown in FIG. 4e, with no distortion. Does not occur. Various semiconductor devices can be formed within the plurality of N-type island regions 17 of the substrate 10' by a normal semiconductor device manufacturing method.

FIG. 5 shows an embodiment in which a bipolar transistor is manufactured within the island region 17. Here, 20 is an Nf type collector buried layer, 21 is a P type base layer, 22 is an N type emitter layer, 23, 24, and 25 are collector electrodes, respectively.
These are the base electrode and the emitter electrode. Note that in this example, N
Before forming the shaped silicon layer 13, the island region 17 is
An N-type impurity layer 20 was formed thereon. In addition to the above-mentioned bipolar transistor, it is possible to form various known semiconductor devices such as I-FET, IIL, MOS, etc. in the above-mentioned island region, and if necessary to form these semiconductor devices, It is also possible to form a P-type silicon layer in the island region in advance.

In the above embodiments, the porous silicon was heat-treated in an oxidizing atmosphere to form the porous silicon into a silicon oxide film, but the heat treatment is not limited to an oxidizing atmosphere.

That is, by heat treatment in ammonia gas,
It is also possible to use a silicon nitride film. However, the heat treatment time and heat treatment temperature required to convert the porous silicon into an insulator are preferably shorter and lower in an oxidizing atmosphere. In this embodiment, the P-type silicon layer 12 and the N-type silicon layer 13 are formed by epitaxial growth, and the P-type impurity diffusion layer 16 is formed by thermal diffusion or ion 1 growth.
Although formed by an implantation method, the silicon layers 12, 13,
The method for forming the diffusion layer 16 is not limited to the embodiments, and any known method or a combination thereof can be used to achieve the object of the present invention.

As explained above, in the present invention, a high concentration N+ type region having an impurity concentration sufficiently higher than that of the N type semiconductor substrate is formed in a desired region of an N type substrate, and a P type semiconductor layer is formed on the high concentration N+ type region. A method for manufacturing a semiconductor device in which an isolation region is formed by uniformly making a P-type semiconductor layer porous and dimorphic and making it an insulator in a semiconductor substrate having an enclosed island region, the method comprising: Since it is formed flat, the distortion that conventionally occurs in the island region is eliminated, and conventional problems such as a decrease in carrier mobility within the island region and the generation of noise due to defects are solved. In addition, since the surface of the island region is flat, microfabrication by photoetching is easy, and the high performance and high density of semiconductor devices can be achieved, so the industrial value is high.

[Brief explanation of drawings]

Figures 1 a to d are manufacturing process diagrams of an integrated circuit board according to a conventional example, Figures 2 a to c are diagrams showing the progress of porosity according to a conventional example, and Figures 3 A and b are one embodiment of the present invention. Figures 4a to 4e are diagrams showing the progress of porosity in an example, and Figures 4a to 4e are manufacturing process diagrams of an integrated circuit substrate in an embodiment of the present invention.
FIG. 3 is a cross-sectional view of a main part of a semiconductor device in an example in which elements are formed within the island region obtained in step e. ]0...N-type silicon substrate, ]1...
High concentration N+ type silicon layer, 12...P type silicon layer, 17...N type island region, 18...
Porous silicon layer, 19...Silicon oxide layer.

Claims (1)

[Claims] 1. Forming an N^+ type semiconductor layer on the surface of the N-type semiconductor substrate so that the surface of the N-type semiconductor substrate is selectively exposed, the layer having an impurity concentration sufficiently higher than that of the N-type semiconductor substrate; A step of forming a P-type semiconductor layer on a substrate, forming an island region of an N-type semiconductor on the surface of the P-type semiconductor layer so as to cover the exposed portion of the N-type semiconductor substrate, and anodizing while irradiating light. A method for manufacturing a semiconductor device, comprising the steps of uniformly making the P-type semiconductor layer porous, and making the porous semiconductor layer an insulator.