JPS6118019A - バイアス回路 - Google Patents

バイアス回路

Info

Publication number
JPS6118019A
JPS6118019A JP59138798A JP13879884A JPS6118019A JP S6118019 A JPS6118019 A JP S6118019A JP 59138798 A JP59138798 A JP 59138798A JP 13879884 A JP13879884 A JP 13879884A JP S6118019 A JPS6118019 A JP S6118019A
Authority
JP
Japan
Prior art keywords
transistor
base
bias circuit
resistance
bias
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59138798A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0580005B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
Masaru Hashimoto
勝 橋本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP59138798A priority Critical patent/JPS6118019A/ja
Publication of JPS6118019A publication Critical patent/JPS6118019A/ja
Publication of JPH0580005B2 publication Critical patent/JPH0580005B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • G05F3/08Regulating voltage or current wherein the variable is DC
    • G05F3/10Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics
    • G05F3/16Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/22Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the bipolar type only

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Control Of Electrical Variables (AREA)
  • Amplifiers (AREA)
JP59138798A 1984-07-04 1984-07-04 バイアス回路 Granted JPS6118019A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59138798A JPS6118019A (ja) 1984-07-04 1984-07-04 バイアス回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59138798A JPS6118019A (ja) 1984-07-04 1984-07-04 バイアス回路

Publications (2)

Publication Number Publication Date
JPS6118019A true JPS6118019A (ja) 1986-01-25
JPH0580005B2 JPH0580005B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1993-11-05

Family

ID=15230474

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59138798A Granted JPS6118019A (ja) 1984-07-04 1984-07-04 バイアス回路

Country Status (1)

Country Link
JP (1) JPS6118019A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5638026A (en) * 1994-07-29 1997-06-10 Kabushiki Kaisha Toshiba High input impedance circuit and semiconductor integrated device provided therewith

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5638026A (en) * 1994-07-29 1997-06-10 Kabushiki Kaisha Toshiba High input impedance circuit and semiconductor integrated device provided therewith

Also Published As

Publication number Publication date
JPH0580005B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1993-11-05

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term