JPS61165148A - Table access instructing system - Google Patents

Abstract

PURPOSE:To decrease the number of steps of table access processing by a computer, by providing a computer instruction having a part for designating a head address of a table, the magnitude of element data, and element data numbers. CONSTITUTION:When an instruction 10 which has been read out by an instruction register for the purpose of its execution is recognized that it is a table access instruction as a result of decoding of an instruction code part 11, one of general registers 17-0-17-n is selected by a gate 16 by the first register designating part 12 of an operand designating part, and inputted as a table head address to an address adding circuit 18. The second register designating part 13 designates a register for holding element data numbers by a gate 19 in the same way, its contents are shifted by a shifting circuit 20 in accordance with a shift designating part 14 for showing the magnitude of element data, and thereafter, inputted to an adding circuit 18 together with a displacement designating part for showing displacement in the element, and an address to be brought to access is determined.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a computer instruction system provided in a processing device or the like to access a table stored in a storage device of a computer system.

In computer system processing, a large amount of tabular data, so-called tables, is used.

Normally, each table consists of multiple element data of the same fixed size, and is stored locally depending on the purpose.

The information is stored in the device, main memory, etc. The size of element data generally differs depending on each table.

When accessing a table in information processing, the processing target is generally specified as a part of specific element data of a specific table, and, for example, only the element data number in that table is advanced, and the same part of each element data is accessed. It is often used to process data in sequence.

Therefore, in each access to a table stored in the t9 device, for example, the storage address of the beginning of the table area that specifies the table, the element data number that specifies element data, and the element that indicates the part of the element data to be accessed. It is necessary to use the displacement within the data to calculate the storage address of the part to be accessed.

[Prior art and problems to be solved by the invention] FIG. 2 shows an example of the structure of a table.

The table starts at a specific first storage address, for example 2
It has a configuration in which n+1 pieces of element data each having a size of b bytes are arranged in a continuous storage area.

Each element data is assigned a sequential number, for example O-n, as the element data number, and data in the table is specified by the element data number and intra-element displacement (for example, byte position from the beginning of the element data). .

Therefore, when accessing certain data in the table, a storage address is calculated as shown in the processing flow chart of FIG.

That is, in step 1 of the process, the storage address at the head of the table is loaded into register RI of the processing device, and in step 2, the element data number is loaded into register R2.

In step 3, the contents of register R2 are shifted b bits to the left (in the direction of the upper digits) according to the element data size 2b specific to the table to be accessed.

In step 4, the value obtained by adding R1, Rz, and the intra-element displacement value is specified as a storage address, and the main storage device or the like is accessed.

As described above, in table access, since each access requires at least four steps, there are problems in that the processing takes a relatively long time and the program becomes complicated.

[Means for solving problems]

The problem described above is that in a processing device that accesses a table consisting of a plurality of element data stored in a distribution device of a computer system, the first storage address of the table,
A computer instruction is provided that has a part that specifies a value regarding the size of the element data and a number of the element data to be accessed, and the computer instruction calculates the start storage address of the element to be accessed based on the specification, and performs the calculation. This problem is solved by the table access instruction method of the present invention, which executes access to element data of the table using the stored storage address.

[Effect]

That is, for example, a part that specifies as operands a register that holds the storage address of the head of the table, a grave value of 2 representing the size as a value related to the size of the element data, and a register that holds the element data number. A table access command is provided which also has an intra-element displacement designation section if necessary.

When this instruction is executed, the specified register is selected, the value obtained by shifting the element data number to the left according to the size of the element data, the start storage address, and the intra-element displacement are added to form the storage address, and the specified register is added. access.

Processing steps are therefore reduced and programming can be simplified.

Table access instructions include load instructions and store instructions, if necessary, like general main memory access instructions.

〔Example〕

FIG. 1 (Al is a block diagram showing the configuration of an embodiment of the present invention.

When the instruction 10 read into the instruction register for execution is identified as a table access instruction by decoding the instruction code portion 11, it operates as described below.

In the operand specification portion of the instruction 10, the first register specification section 12 specifies the register that holds the storage address at the head of the table.

The second register designation unit 13 designates a register that holds an element data number.

The shift specifying unit 14 specifies the curtain value of 2 (for example, b when the size of the element data is 2b) representing the size of the element data, and the displacement specifying unit 15 specifies the value of intra-element displacement.

In executing the instruction 10, the first register specifying unit 12 uses the gate 16 to select the general-purpose registers 17-0 to 1 of the processing device.
A designated Luzisk is selected from 7-n and its contents are input to the address addition circuit 18.

Further, the second register specifying unit 13 selects a specified register from the general-purpose registers 17-0 to 17-n by the gate 19, inputs the contents to the shift circuit 20, and transfers the shift result by the shift circuit 20 to the address. It is input to the adder circuit 18.

The number of shift bits of the shift circuit 20 is determined by the shift specifying section 14.
The input is shifted to the left by the number of bits equal to the value specified in the shift specifying section 14 and output.

The element force displacement designation value of the displacement designation section 15 is input to the address addition circuit 18 as is.

The address adding circuit 18 adds up the above three human forces and outputs the result. This output is used to designate the storage address to be accessed, and the main storage, local storage, etc. are accessed as usual.

By using this instruction, the storage address calculation part during table access becomes three steps, steps 21 to 23, as shown in FIG. 1(b).

〔Effect of the invention〕

As is clear from the above description, the present invention reduces the number of table access processing steps in computer processing and simplifies programming, so it has a significant industrial effect of improving the utilization of the computer system.

[Brief explanation of the drawing]

Fig. 1Fa) is a block diagram of the configuration of an embodiment of the present invention;
Figure (bl is a flowchart of processing according to an embodiment of the present invention, Figure 2 is a diagram showing an example of table configuration, and Figure 3 is a flowchart of conventional processing. In the figure, 1 to 4, 21 to 23 are Processing steps, 10 is an instruction,
11 is an instruction code section, 12 is a second register specification section, 13 is a second register specification section, 14 is a shift specification section, 15 is a displacement specification section, 16.1
9 is a gate, 17-0 to 17-n are general-purpose registers, 18 is an address adder circuit, and 20 is a shift circuit. Mine 1 figure (σ) (b) Bud 2 figure

Claims (1)

[Claims] In a processing device that accesses a table consisting of a plurality of element data stored in a storage device of a computer system, the first storage address of the table, the value related to the size of the element data, and the number of the element data to be accessed. A computer instruction having a part specifying is provided, the computer instruction calculates the first storage address of the element to be accessed according to the specification, and executes access to the element data of the table using the calculated storage address. Table access command method.