JPS61148838A - Construction of electrode and wiring - Google Patents

Abstract

PURPOSE:To improve the reliability and wiring construction burying a conductive material satisfactorily in a minute contact hole by connecting a lower conductor and an upper wiring with a metal silicide filled by CVD in the contact hole. CONSTITUTION:A tungsten silicide film 8a is formed on all the surface by reduced pressure CVD after a contact hole 7 is formed. In this case, if the film thickness (t) is made more than a half of the diameter (width) phi of the hole 7, the tungsten silicide film 8a is perfectly filled in the hole 7 and deposited to nearly the same thickness to other positions. Then, the tungsten silicide film 8a on an interlayer insulation film 6 is removed by dry etching and the silicide film 8a is left only in the contact hole. An Al wiring 9 is formed on the silicide film 8a and a wiring construction is completed without the problem of a coverage, etc.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a highly reliable electrode/wiring structure suitable for use in semiconductor integrated circuit devices and the like.

[Background technology]

LS1. In semiconductor integrated circuit devices such as VLSI, A! Metals such as and other metals are used, and each element is not only interconnected in the planar direction, but also connected in the vertical (thickness) direction across the interlayer insulating film. In particular, for vertical connections, a contact hole is opened in the interlayer insulating film, and the lower conductor is exposed at the bottom of the contact hole, and the upper conductor (wiring) is partially buried in the contact hole. The electrodes are configured and connections are made using the following steps.

By the way, as devices have become more highly integrated in recent years, the aforementioned contact holes have also been made smaller as elements become smaller, and the ratio of the depth to the diameter of the contact hole (aspect ratio) has increased. ) becomes thicker (becomes).For this reason, conventionally it was possible to form an electrode by burying A! into the contact hole by simply depositing AJ3 for wiring on the contact hole, but with the increase in aspect ratio. As a result, the filling performance of A! into the hole becomes poor (and is almost impossible with recent 1 μm contact holes. Therefore, the contact resistance between the lower conductor and the upper A! wiring becomes The reliability of the electrodes or wiring is reduced due to increase in the number of contacts or poor contact.

To address this problem, Japanese Patent Application Laid-Open No. 58-52872 proposes a method of burying fine contact holes using polysilicon that can be formed by low pressure CVD. However, in this method, if the lower conductor is a semiconductor, it is necessary to convert the polarity of the polysilicon to n-type or p-type depending on the polarity of its conductivity type (n-type, p-type). When n-type and p-type are mixed in the lower conductor as in MOS, the manufacturing process becomes extremely complicated.

[Purpose of the invention]

An object of the present invention is to improve the reliability of an electrode or wiring structure by embedding a conductive material in a fine contact hole in a good manner, and to provide an electrode/wiring structure in which the conductive material can be easily buried. It is in.

The above and other objects and novel features of the present invention are as follows:
It will become clear from the description of this specification and the accompanying drawings.

[Summary of the invention]

A brief overview of typical inventions disclosed in this application is as follows.

That is, by filling the contact hole with metal silicide deposited by the CVD method and connecting the lower conductor and the upper wiring through the metal silicide, a fine contact can be created due to the CVD deposition. The holes are well filled and the connection between the upper and lower conductors is good, and since the filling material is metal silicide, there is no negative effect on the upper or lower conductors, making it a highly reliable electrode. or a wiring structure can be obtained.

〔Example〕

FIG. 1 shows an embodiment in which the present invention is applied to a MOS transistor, and FIGS. 2(A) to 2(C) show one example of manufacturing the main parts thereof.

That is, a field insulating film 2 and a gate insulating film 3 are formed on a silicon substrate 1, and a gate electrode 4 is formed by patterning using polysilicon.

Further, an impurity layer is formed on the main surface of the silicon substrate 1 by the self-line method using the gate electrode 4, and this is formed as a source/drain region 5.5. Then, after forming a glabellar insulating film 6 of KSiO1, PSG, etc. on the entire surface, contact holes 7.7 are opened for connecting with the source/drain regions 5, 5 as lower conductors.
A! An electrode 8.8 is formed here and a pattern is formed on the glabella insulating film 6! A connection is being made to wiring 9.9. This electrode 8.8 is made of metal silicide, in this example tungsten silicide 8a, filled in the contact hole 7.7.
* Constructed of 8 a, this tungsten silicide 8
The lower source/drain region 5.5 and the A1 wiring 9.9 are connected to each other via a and 8a.

As shown in FIG. 2A, the electrode 8.8 is formed by forming a tungsten silicide film 8a over the entire surface by low pressure CVD after the contact hole 7 is formed. At this time, if the film thickness t is made to be more than half the diameter (width) φ of the hole 7, the tungsten silicide film 8a will completely fill the hole 7, as shown in the same figure, and it will not overlap other parts even on the hole 7. They are deposited to almost the same thickness. However, the same figure (B)
If the tungsten silicide film 8a on the glabellar insulating film 6 is etched away using the dry etching method, the silicide 8a remains only in the contact hole 7. Therefore, if the AJ wiring 9 is formed thereon by a conventional method, problems such as coverage will not occur (the wiring structure is completed) as shown in FIG. The wiring structure is made of tungsten silica, and the holes 7 on the side 8a are filled by the CVD method, so the holes 7 are well filled and the connections with the source/drain regions 5 and the wiring 9 are extremely good. It can be made into something.

The reliability of electrodes and wiring can also be improved by making the holes 7 smaller. Further, when forming this structure, unlike the case of polysilicon, there is no need to consider the conductivity type polarity of n-type and p-type (and no complicated process is required).

On the other hand, a method of selectively forming a tungsten (pure metal) film on silicon has been proposed as one of the methods for forming a tungsten (pure metal) film using the CVD method.

In other words, it is conceivable to form a tungsten film only in the hole 7 and fill the hole 7 with this. Shikar]
Although this film forming method does not require an etching step, the selectivity decreases when the thickness exceeds 300 OA, so it is difficult to apply to the contact hole with a depth of about 800 OA described above. Furthermore, there are also problems in terms of heat resistance, such as the tungsten filled in the holes sucking up silicon from the substrate and damaging it during heat treatment in a post-process, making it difficult to put it into practical use. In this respect, since the material of this example has already been silicided, silicon is not sucked up (and is advantageous in terms of heat resistance).

〔effect〕

(1) The contact hole is filled with metal silicide deposited by the CVD method, and the lower conductor and upper conductor (wiring) are connected via this metal silicide, so if the contact hole is minute. However, the metal silicide fills the holes in good condition, improving the reliability of the connections between the upper and lower conductors.

(2) The hole is filled with metal silicide.

The upper and lower conductors, % (there is no need to consider the polarity of the conductivity type of the lower conductor, and therefore the manufacturing process does not become complicated and can be easily configured.

(3) Since the hole is filled with metal silicide,
Even in the post-process heat treatment, no silicon is sucked up from the lower conductor, which prevents damage to the conductor and improves reliability.

Although the invention made by the present inventor has been specifically described above based on examples, the present invention is not limited to the above-mentioned examples (although it is understood that changes can be made to the extent possible without departing from the gist of the invention). Needless to say, for example, the metal silicide to be filled in the hole is not limited to tungsten silicide, and any metal silicide that can be deposited by CVD can be used.

[Application field]

In the above explanation, the invention made by the present inventor was mainly applied to the electrode/wiring structure of a MOS transistor, which is the background field of application, but the invention is not limited to this (MO8 type semiconductor The present invention can be applied not only to devices and bipolar semiconductor devices, but also to all multilayer wiring structures in which a semiconductor is formed as a part.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of one embodiment of the present invention. FIGS. 2(A) to 2(C) are sectional views of main parts to show the manufacturing process. 1... Silicon substrate, 4... Gate electrode, 5...
Source/drain region (lower conductor), 6... Interlayer insulating film, 7... Contact hole, 8... Electrode, 8a.
...Tungsten silicide, 9...A! Wiring (upper conductor). Figure 1

Claims (1)

[Claims] 1. A structure in which the upper or lower conductor is made of a semiconductor such as silicon, and the upper and lower conductors are connected, and the contact is formed in an interlayer insulating film between both conductors. An electrode/wiring structure characterized in that a hole is filled with metal silicide deposited by a CVD method, and upper and lower conductors are connected via the metal silicide. 2. The electrode/wiring structure according to claim 1, wherein the metal silicide is tungsten silicide. 3. The electrode/wiring structure according to claim 1 or 2, wherein metal silicide is deposited by a low-pressure CVD method, and then unnecessary portions are removed by etching to fill the holes.