JPH03116852A - Semiconductor device - Google Patents

Abstract

PURPOSE:To make semiconductor device of this design high in component density by a method wherein a lower wiring layer is composed of a first conductive layer in contact with a lower conductive layer at a first contact hole, a pad layer filled in the first contact hole, and a second conductive layer formed covering the first conductive layer and the pad layer. CONSTITUTION:A field insulating film 102 and a diffusion layer 103 are formed on a semiconductor substrate 1, an insulating film 104 is formed thereon, and a contact hole 105 is provided through a photoetching method. A tungsten silicide layer 106a is formed through a sputtering method, and a silicon dioxide film 107a is formed as thick as required. Then, a silicon dioxide film 107 is left unremoved only inside the contact hole through a whole area etching, and an Al layer 108a is formed. Then, the substrate is patterned through a photoetching method to form an Al wiring layer 108 and a tungsten silicide layer 106. Thereafter, an insulating film 109 is provided, then a contact hole 110 is bored, and an Al wiring layer 111 is formed. By this setup, a contact connection can be made small enough in resistance.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to a semiconductor device having multiple wiring layers.

[Prior Art] A cross-sectional view of a conventional semiconductor device having two wiring layers is shown in FIG.
As shown in the figure, the conventional semiconductor device has a first contact hole 405 on a semiconductor substrate 401 having a field insulating film 402 and a diffusion layer 403.
A first insulating film 404 is provided on the first insulating crotch, and a first insulating film 404 is provided on the first insulating crotch, and a first insulating film 404 is provided in contact with the diffusion layer 403 through a first contact hole 405.
A ρ wiring layer 414 is provided, and a second insulating film 409 having a second contact hole 410 is further provided on the wiring layer 414. 2nd/l wiring layer 41 in contact with wiring layer 414
1.

FIG. 5 is a sectional view showing another conventional example. In this example, as shown in FIG. 5, polysilicon 416 is buried in the first contact hole, and after the contact portion is flattened, a first AI wiring layer 415 is formed thereon.

[Problems to be Solved by the Invention] In the conventional example shown in FIG.
m or more), this has been an obstacle to increasing the density of semiconductor devices. The reason why the positions of both contacts and holes must be even is that when the second contact hole 410 is opened directly above the first contact hole 405, as shown in FIG. 41
4, the step of the first contact hole 405 is
It is reflected on the AiI wiring layer 414 and the second contact hole 41
Since the depth of 0 is the combined depth of the first contact step and the second contact step, the second AiI wiring layer 41
This is because an accident may occur in which wire No. 1 breaks at the second contact stage.

Furthermore, as shown in FIG. 5, when polysilicon 416 is embedded inside the first contact hole, polysilicon 416
It is necessary to introduce impurities into 16 by ion implantation and then perform heat treatment to lower the contact connection resistance. However, in recent years, in order to improve the performance of semiconductor devices, especially transistors, it is necessary to keep the channel length short, so there is a tendency to suppress heat treatment as much as possible. Therefore, the heat treatment described above could not be performed sufficiently, and the contact connection resistance could not be sufficiently reduced.

[Means for Solving the Problems] A semiconductor device of the present invention has at least two multilayer wiring layers, and a lower wiring layer of the multilayer wiring is formed on an insulating film provided below. The contact hole extends through the contact hole formed in the insulating film and contacts the conductive layer formed under the CC insulating film. The lower wiring layer includes a first conductor layer that covers the insulation crotch, a side wall and a bottom surface of the contact hole, a pad layer that is on the first conductor layer and fills the contact hole, and a pad layer that is on the first conductor layer and fills the contact hole. and a second conductor layer formed on one conductor layer and covering the pad layer.

[Example] Next, an example of the present invention will be described with reference to the drawings.

FIG. 1 is a sectional view showing one embodiment of the present invention. In the same figure, parts equivalent to those in the conventional example shown in FIG. 4 are given reference numbers with the same last two digits, so redundant explanation will be omitted. The difference from the conventional example is that the first wiring layer is in contact with the diffusion layer 103,
A thin tungsten silicide layer 106 extending on the first insulating film 104, a silicon dioxide film 107 flatly filling the first contact hole 105, a first A formed on the tungsten silicide layer 106 and the silicon dioxide film 107, It is constituted by the lfl wiring layer 108. That is, in this embodiment, in the contact hole portion, the tungsten silicide layer 106 and the first Af wiring layer 108 are separated by the silicon dioxide film 107, and in other portions, the wiring layer is separated from the silicide layer 106 and the first AiI wiring layer. It has a two-layer structure.

According to this configuration, since the first A, O wiring layer 108 is formed flat even in the contact portion, even if the second contact hole 110 is opened directly above the first contact hole 105,
The second A and R wiring layers 111 will not be disconnected at the second contact portion.

Regarding electrical conduction, in the first contact part, the diffusion layer 1
03 and the first Affl wiring layer 108 are connected through the tungsten silicide layer 106, but since the tungsten silicide layer has a low specific resistance of about 2 Ω·cm,
The contact connection resistance is almost the same as that of the conventional example shown in FIG.

Next, the manufacturing method of this example will be explained with reference to FIGS. 2(a) to 2(f).

First, as shown in FIG. 2(a), a field insulating film 102 and a diffusion layer 103 are formed on a semiconductor substrate 1 in the same manner as in the conventional method, and a first insulating film 1o4 is formed to a thickness of 10,000 mm.
After the first contact hole 105 is formed, a first contact hole 105 having a size of 18 m x 1 μm is formed by photoetching.

Next, as shown in FIG. 2(b), a tungsten silicide layer 106a having a thickness of 1,000 mm is formed by sputtering.

Next, as shown in FIG. 2(c), a silicon dioxide film 107a is formed to a thickness of 10,000 by CVD. When formed thickly in this way, the inside of the contact hole is buried and the growth surface becomes almost flat.

Next, as shown in FIG. 2(d), the entire surface is etched so that the silicon dioxide film 107 remains only inside the first contact hole 105. Subsequently, as shown in FIG. 2(e), an Ap layer 108a having a thickness of 8,000 layers is formed.

Thereafter, as shown in FIG. 2(f), the AJ layer 108a and the tungsten silicide layer 106a are patterned by photoetching to form the first AJ wiring layer 108 and the tungsten silicide layer 106.

Thereafter, a second insulating film 109 with a thickness of i o and ooo is formed by a conventional method, a second contact hole 110 is opened, and a second AJ wiring layer 111 with a thickness of 8000 is formed. The semiconductor device shown in FIG. 1 is completed.

FIG. 3 is a sectional view showing another embodiment of the present invention. In the figure, the same reference numerals are given to the same parts as those in the previous embodiment.

In this embodiment, the underlying wiring layer is changed from a diffusion layer to a polysilicon layer 112. In addition, the first contact hole 105
In this embodiment, the material filling the contact hole is also polysilicon 113, and the tungsten silicide layer 106' is only formed around the contact hole.
Although it has the same effect as the previous embodiment, in this embodiment, since the contact hole portion is filled with the polysilicon layer 113, if an impurity is introduced into the polysilicon layer 113,
Contact connection can now be made through conductive polysilicon, and contact connection resistance can be lowered.

In the above embodiments, tungsten silicide is used as the material for making contact in the first contact hole, but this can be changed to other metal silicides or high melting point metal materials.

Furthermore, the material to be filled in the contact hole is PSG.
, PBSG, silicon nitride, etc. can be used.

Further, in the embodiment, a semiconductor device having two Af wiring layers has been described, but the present invention is not limited to this, and can be implemented similarly to a semiconductor device having three or more AII wiring layers.

In that case, a contact structure similar to that of the first contact hole 105 may be adopted for multiple wiring layers.

[Effects of the Invention] As explained above, in the semiconductor device of the present invention, the lower wiring layer is filled with the first conductor layer that contacts the lower conductor layer in the first contact hole and the first contact hole. 1 because it is composed of a pad layer and a second conductive layer formed to cover the first conductor layer and the pad layer.
According to the present invention, even if the second contact hole is provided directly above the first contact hole, disconnection does not occur in the upper wiring layer. There is no need to provide a certain distance between the contact hole and the semiconductor device, and it becomes possible to increase the density of the semiconductor device. Furthermore, since a low-resistance conductor layer is used as the material for making contact, contact connection resistance can be made sufficiently low.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing one embodiment of the present invention, and FIG.
) to (f) are cross-sectional views of a semiconductor device for explaining its manufacturing process, FIG. 3 is a cross-sectional view showing another embodiment of the present invention, and FIGS. 4 to 6 are conventional examples, respectively. FIG. 101.401...Semiconductor substrate, 102.40
2...Field insulating film, 103.40300
．． Diffusion layer, 104,404...first insulating film, 1
05.405...first contact hole, 106.106
a, 106'--tungsten silicide layer,
107.107a...Silicon dioxide film, 10
8...1st AJ wiring layer, 108a...A(layer,
109...Second insulating film, 110.410...
・Second contact hole, 111.411...2nd A, R
wiring layer, 112... polysilicon layer,
113...Polysilicon, 414.415...First
A, R wiring layer, 416... polysilicon.

Claims (1)

[Claims] a lower conductive layer, a first insulating film covering the lower conductive layer, and a first insulating film connected to the lower conductive layer through a first contact hole formed in the first insulating film; A first wiring layer extending over a first insulating film, a second insulating film covering the first wiring layer, and a second contact hole formed in the second insulating film. In a semiconductor device comprising a second wiring layer connected to the first wiring layer and extending over the second insulating film, the first wiring layer is connected to the first wiring layer and extends over the second insulating film. a first conductor layer covering the sidewall and bottom surface of the first contact hole; a pad layer embedded in the first contact hole; and a pad layer formed to cover the first conductor layer and the pad layer. A semiconductor device comprising a second conductor layer.