JPS61136641U - - Google Patents

Info

Publication number
JPS61136641U
JPS61136641U JP1883485U JP1883485U JPS61136641U JP S61136641 U JPS61136641 U JP S61136641U JP 1883485 U JP1883485 U JP 1883485U JP 1883485 U JP1883485 U JP 1883485U JP S61136641 U JPS61136641 U JP S61136641U
Authority
JP
Japan
Prior art keywords
outputs
pulse
deglitched
converter
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1883485U
Other languages
Japanese (ja)
Other versions
JPH0641393Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1985018834U priority Critical patent/JPH0641393Y2/en
Publication of JPS61136641U publication Critical patent/JPS61136641U/ja
Application granted granted Critical
Publication of JPH0641393Y2 publication Critical patent/JPH0641393Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Analogue/Digital Conversion (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は、従来回路のブロツク図、第２図は、
主要な信号のタイムチヤート、第３図は、従来回
路の動作を説明する為の図、第４図は、本考案の
一実施例を示すブロツク図、第５図は、制御回路
のデイグリツチパルス信号Ｃ及び制御パルス信号
Ｅを示す波形図、第６図は、デイグリツチ回路出
力の波形図である。 主要部分の符号の説明、１……Ｄ／Ａ変換回路
、２……可変利得アンプ、３……デイグリツチ回
路、４……制御回路、５……平均値回路。 Fig. 1 is a block diagram of a conventional circuit, and Fig. 2 is a block diagram of a conventional circuit.
Figure 3 is a diagram for explaining the operation of the conventional circuit; Figure 4 is a block diagram showing an embodiment of the present invention; Figure 5 is a day-grid diagram of the control circuit. FIG. 6 is a waveform diagram showing the pulse signal C and the control pulse signal E, and is a waveform diagram of the deglitch circuit output. Explanation of symbols of main parts: 1...D/A conversion circuit, 2...Variable gain amplifier, 3...Deglitch circuit, 4...Control circuit, 5...Average value circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] デイグリツチパルスに応じてグリツチノイズ発
生を防止しつつ供給される仮数部と指数部からな
るコードデータに対応したアナログ値を出力する
デイグリツチドＤ／Ａ変換器であつて、前記コー
ドデータの仮数部のデイジタル値に応じたアナロ
グ信号を出力するＤ／Ａ変換回路と、前記デイグ
リツチパルスに同期しかつ前記指数部の値に応じ
てパルス幅が変化する制御パルス信号を出力する
制御回路と、前記制御パルス信号に応じて前記ア
ナログ信号を間欠的に通過せしめるスイツチング
回路とを備えたことを特徴とするデイグリツチド
Ｄ／Ａ変換器。 A deglitched D/A converter that outputs an analog value corresponding to code data consisting of a mantissa part and an exponent part supplied while preventing the generation of glitch noise in response to a deglitch pulse, a D/A conversion circuit that outputs an analog signal according to the digital value; a control circuit that outputs a control pulse signal that is synchronized with the day glitch pulse and whose pulse width changes according to the value of the exponent part; A deglitched D/A converter comprising: a switching circuit that intermittently passes the analog signal in accordance with a control pulse signal.
JP1985018834U 1985-02-13 1985-02-13 Diglitch D / A converter Expired - Lifetime JPH0641393Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1985018834U JPH0641393Y2 (en) 1985-02-13 1985-02-13 Diglitch D / A converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1985018834U JPH0641393Y2 (en) 1985-02-13 1985-02-13 Diglitch D / A converter

Publications (2)

Publication Number Publication Date
JPS61136641U true JPS61136641U (en) 1986-08-25
JPH0641393Y2 JPH0641393Y2 (en) 1994-10-26

Family

ID=30507841

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1985018834U Expired - Lifetime JPH0641393Y2 (en) 1985-02-13 1985-02-13 Diglitch D / A converter

Country Status (1)

Country Link
JP (1) JPH0641393Y2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6429119A (en) * 1987-07-24 1989-01-31 Sharp Kk Delta modulation code decoder

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5610738A (en) * 1979-07-09 1981-02-03 Yokogawa Hokushin Electric Corp Digital-to-analog converter
JPS5723321A (en) * 1980-07-17 1982-02-06 Sanyo Electric Co Ltd Digital-to-analog converter
JPS58151106A (en) * 1982-03-04 1983-09-08 Mitsubishi Electric Corp Fader circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5610738A (en) * 1979-07-09 1981-02-03 Yokogawa Hokushin Electric Corp Digital-to-analog converter
JPS5723321A (en) * 1980-07-17 1982-02-06 Sanyo Electric Co Ltd Digital-to-analog converter
JPS58151106A (en) * 1982-03-04 1983-09-08 Mitsubishi Electric Corp Fader circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6429119A (en) * 1987-07-24 1989-01-31 Sharp Kk Delta modulation code decoder

Also Published As

Publication number Publication date
JPH0641393Y2 (en) 1994-10-26

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