JPS61133833U - - Google Patents
Info
- Publication number
- JPS61133833U JPS61133833U JP1693685U JP1693685U JPS61133833U JP S61133833 U JPS61133833 U JP S61133833U JP 1693685 U JP1693685 U JP 1693685U JP 1693685 U JP1693685 U JP 1693685U JP S61133833 U JPS61133833 U JP S61133833U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- data processing
- processing section
- digital
- photocoupler
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000004913 activation Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Input From Keyboards Or The Like (AREA)
Description
第１図は本考案の一実施例回路のブロツク図、
第２図は従来回路のブロツク図である。
ＤＳ１〜ＤＳ８……デイジタルスイツチ、１０
……ＣＰＵ（データ処理部）、１２……フオトカ
プラ、１４……バツフア回路、１６……ラツチ回
路。
FIG. 1 is a block diagram of a circuit according to an embodiment of the present invention.
FIG. 2 is a block diagram of a conventional circuit. DS1~DS8...Digital switch, 10
... CPU (data processing unit), 12 ... photo coupler, 14 ... buffer circuit, 16 ... latch circuit.
Claims (1)
定値をデータ処理部に読み込むための回路であつ
て、入力側に各デイジタルスイツチの出力が並列
接続されたフオトカプラと、このフオトカプラの
出力側と上記データ処理部のデータラインとを結
合するバツフア回路と、上記データ処理部から与
えられる上記各デイジタルスイツチの選択信号を
保持し、各デイジタルスイツチのいずれか１つに
能動化信号を印加するラツチ回路とからなること
を特徴とするデイジタルスイツチの設定値読み込
み回路。 A circuit for reading respective setting values from a plurality of digital switches into a data processing section, which includes a photocoupler to which the outputs of each digital switch are connected in parallel on the input side, and the output side of this photocoupler and the above data processing section. It consists of a buffer circuit that connects the data line, and a latch circuit that holds the selection signal for each of the digital switches given from the data processing section and applies an activation signal to any one of the digital switches. Features a digital switch setting value reading circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1693685U JPS61133833U (en) | 1985-02-08 | 1985-02-08 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1693685U JPS61133833U (en) | 1985-02-08 | 1985-02-08 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61133833U true JPS61133833U (en) | 1986-08-21 |
Family
ID=30504173
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1693685U Pending JPS61133833U (en) | 1985-02-08 | 1985-02-08 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61133833U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4933724B1 (en) * | 1967-02-08 | 1974-09-09 |
-
1985
- 1985-02-08 JP JP1693685U patent/JPS61133833U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4933724B1 (en) * | 1967-02-08 | 1974-09-09 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS61133833U (en) | ||
| JPS60111132U (en) | Digital data input circuit | |
| JPS6446862U (en) | ||
| JPH0189345U (en) | ||
| JPH02101632U (en) | ||
| JPS5863636U (en) | switch input circuit | |
| JPS5885229U (en) | key matrix circuit | |
| JPH01178634U (en) | ||
| JPH0433136U (en) | ||
| JPS63118626U (en) | ||
| JPS63159427U (en) | ||
| JPS6059686U (en) | signal monitoring circuit | |
| JPS59182797U (en) | alarm circuit | |
| JPS63156124U (en) | ||
| JPS6370732U (en) | ||
| JPS6312242U (en) | ||
| JPS63155549U (en) | ||
| JPS62132457U (en) | ||
| JPS6444475U (en) | ||
| JPS6397103U (en) | ||
| JPS6146623U (en) | keyboard interface device | |
| JPS58123637U (en) | Composite equipment | |
| JPS5984697U (en) | Arithmetic circuit | |
| JPS5854786U (en) | Vending machine product selection device | |
| JPS6380651U (en) |