JPS6112293B2 - - Google Patents

Info

Publication number
JPS6112293B2
JPS6112293B2 JP55028502A JP2850280A JPS6112293B2 JP S6112293 B2 JPS6112293 B2 JP S6112293B2 JP 55028502 A JP55028502 A JP 55028502A JP 2850280 A JP2850280 A JP 2850280A JP S6112293 B2 JPS6112293 B2 JP S6112293B2
Authority
JP
Japan
Prior art keywords
input
logic
memory
memory cells
shift
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55028502A
Other languages
English (en)
Japanese (ja)
Other versions
JPS56124957A (en
Inventor
Katsuaki Oowada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP2850280A priority Critical patent/JPS56124957A/ja
Publication of JPS56124957A publication Critical patent/JPS56124957A/ja
Publication of JPS6112293B2 publication Critical patent/JPS6112293B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318558—Addressing or selecting of subparts of the device under test

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
JP2850280A 1980-03-06 1980-03-06 Logical test circuit Granted JPS56124957A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2850280A JPS56124957A (en) 1980-03-06 1980-03-06 Logical test circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2850280A JPS56124957A (en) 1980-03-06 1980-03-06 Logical test circuit

Publications (2)

Publication Number Publication Date
JPS56124957A JPS56124957A (en) 1981-09-30
JPS6112293B2 true JPS6112293B2 (enrdf_load_html_response) 1986-04-07

Family

ID=12250444

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2850280A Granted JPS56124957A (en) 1980-03-06 1980-03-06 Logical test circuit

Country Status (1)

Country Link
JP (1) JPS56124957A (enrdf_load_html_response)

Also Published As

Publication number Publication date
JPS56124957A (en) 1981-09-30

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