JPS61119068A - Snubber circuit of semiconductor switch - Google Patents

Snubber circuit of semiconductor switch

Info

Publication number
JPS61119068A
JPS61119068A JP23943384A JP23943384A JPS61119068A JP S61119068 A JPS61119068 A JP S61119068A JP 23943384 A JP23943384 A JP 23943384A JP 23943384 A JP23943384 A JP 23943384A JP S61119068 A JPS61119068 A JP S61119068A
Authority
JP
Japan
Prior art keywords
terminal
capacitor
snubber circuit
container
semiconductor switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23943384A
Other languages
Japanese (ja)
Inventor
Michiharu Ishido
石堂 道治
Kinya Warabisaki
蕨崎 勤哉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP23943384A priority Critical patent/JPS61119068A/en
Publication of JPS61119068A publication Critical patent/JPS61119068A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • H01L23/642Capacitive arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

PURPOSE:To enable the breaking capability of a semiconductor switch maximum reducing the stray inductance of the main circuit wiring in a snubber circuit with a simple stuck construction by using the external container of a condenser as an electrode. CONSTITUTION:The ends of terminal rods 1, 1 are connected to electrodes 2, 2 provided at both the ends of a condenser element 3 and one terminal rod 1 is insulated with an insulating material 15 from an external container (a conductor) 4 and is externally projected. The other terminal rod 1 is attached to the internal surface of the container and uses the container as an electrode. A terminal 16 is integrally installed on the external surface of the container. Since the terminal 16 provided on the external container of a condenser can be connected directly to the terminal 17 of a G.T.O. thyristor 5, wiring with a wire is unnecessary. The wiring from a rectifying diode 6 to a condenser 7 is also sufficient with a sort lead wire 18.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、半導体スイッチのスナバ回路、特に、半導
体スイッテと並列に整流ダイオードとコンデンサの直列
接続体を接続し、上記整流ダイオードと並列に抵抗を接
続したスナバ回路に関する本のである。
[Detailed Description of the Invention] [Field of Industrial Application] This invention relates to a snubber circuit for a semiconductor switch, in particular, a series connection body of a rectifier diode and a capacitor is connected in parallel with the semiconductor switch, and a resistor is connected in parallel with the rectifier diode. This is a book about snubber circuits that connect .

〔従来の技術〕[Conventional technology]

第4図はスナバ回路の構成部品である従来のコンデンサ
の構造を示す外箱を横断した正面図で、1は正・負の両
端子、2は電極、3はコンデンサ本体の素子、4は外箱
を表わしている。
Figure 4 is a front view across the outer box showing the structure of a conventional capacitor that is a component of a snubber circuit, where 1 is the positive and negative terminals, 2 is the electrode, 3 is the element of the capacitor body, and 4 is the outside. It represents a box.

第5図は、上記従来のコンデンサを用いたスタック組立
ての例を示しており、5は半導体スイッチとしてのゲー
トターンオフサイリスタ(以下G。
FIG. 5 shows an example of a stack assembly using the above-mentioned conventional capacitor, and 5 is a gate turn-off thyristor (hereinafter referred to as G) as a semiconductor switch.

T、 Oサイリスタと称す)、6は整流ダイオード、7
はコンデンサ、8は冷却フィン、9はコンデンサ7と冷
却フィン8を絶縁するベーク板、10はその他の部品を
表わす。
T, O thyristor), 6 is a rectifier diode, 7 is a rectifier diode,
8 is a capacitor, 8 is a cooling fin, 9 is a baking plate that insulates the capacitor 7 and the cooling fin 8, and 10 is other parts.

第6図はスナバ回路の一例全示す。第6図において、5
はG、 T、 Oサイリスタで、図示されていない電源
から同じく図示されていない負荷に供給する電力を制御
する。整流ダイオード6とコンデンサ7の直列接続体は
、G、T、Oサイリスタ5の陽極、陰極間に陽極側から
陰極側に電流を流す方向に接続される。抵抗11は整流
ダイオード6と並列に接続嘔れている。インダクタンス
12は整流ダイオード6とコンデンサ7とG、T、 O
サイリスタ5を結ぶ配線に伴う漂遊インダクタンスであ
る。
FIG. 6 shows an example of a snubber circuit. In Figure 6, 5
G, T, O thyristors control the power supplied from a power source (not shown) to a load (also not shown). A series connection body of the rectifier diode 6 and the capacitor 7 is connected between the anode and cathode of the G, T, O thyristor 5 in a direction in which current flows from the anode side to the cathode side. The resistor 11 is connected in parallel with the rectifier diode 6. Inductance 12 is composed of rectifier diode 6, capacitor 7, G, T, O
This is the stray inductance associated with the wiring connecting the thyristors 5.

第6図のスナバ回路図において、G、T、0サイリスタ
5に流れる電流iを該G、 T、 0サイリスタのゲー
トターンオフ動作で透析した場合を考えると、G、 T
、 Oサイリスタ5の電流が遮断されると、今まで流れ
ていた電流iは、スナバ回路の整流ダイオード6とコン
デンサ外箱通してバイパスしようとする。この時の電流
波形13.電圧波形14を第7図に示している。
In the snubber circuit diagram of FIG. 6, if we consider the case where the current i flowing through the G, T, 0 thyristor 5 is dialyzed by the gate turn-off operation of the G, T, 0 thyristor, then G, T
, O When the current of the thyristor 5 is cut off, the current i that has been flowing so far tries to bypass it through the rectifier diode 6 of the snubber circuit and the capacitor outer box. Current waveform 13 at this time. The voltage waveform 14 is shown in FIG.

今、G、 T、 Oサイリスタ5の透析速度t−di/
dtとすると、スナバ回路の整流ダイオード6とコンデ
ンサ7に流れる電流の立ち上りもこれと同じdi/dt
の速度となる。この時、スナバ回路に含まれる漂遊イン
ダクタンス12の値tLsとすると、スナバ回路の両端
子間つまりG、 T、 Oサイリスタ5の両端には、V
nsp −Ls −di /dtのステップ状のスパイ
ク電圧が発生する。このスパイク電圧VDspはG、 
T、 Oサイリスタ5のゲートター/オフ条件の重要な
パラメータの1つであり、この値が600〜1000v
に達すると、G、T。0サイリスタ5の透析耐量は著し
く低下する。
Now, the dialysis rate t-di/ of G, T, O thyristor 5
dt, the rise of the current flowing through the rectifier diode 6 and capacitor 7 of the snubber circuit is also the same di/dt.
The speed will be . At this time, if the value of the stray inductance 12 included in the snubber circuit is tLs, then V
A step-like spike voltage of nsp −Ls −di /dt is generated. This spike voltage VDsp is G,
T, O is one of the important parameters of the gateter/off condition of thyristor 5, and this value is 600~1000v
When it reaches G, T. The dialysis capacity of the 0 thyristor 5 is significantly reduced.

実動作上では上記スパイク電圧Vosp t−できる限
り低い値に抑制することが望ましいが、透析速度di/
dtの値はG、 T、 Oサイリスタ自体の駆動条件及
び個有の特性により決まるため、こfl−全抑制するこ
とは大変困難である。従って、スノくイク電圧VD6F
の値を下げるためには、スナバ回路に含まれる漂遊イン
ダクタンス12の値を低減する必要がある。
In actual operation, it is desirable to suppress the spike voltage Vosp t to a value as low as possible, but the dialysis rate di/
Since the value of dt is determined by the driving conditions and unique characteristics of the G, T, and O thyristors themselves, it is very difficult to completely suppress fl. Therefore, the snow orgasm voltage VD6F
In order to lower the value of , it is necessary to reduce the value of stray inductance 12 included in the snubber circuit.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上記のような従来のスナバ回路では、整流ダイオードと
コンデンサとG、 T、 0サイリスタを結ぶ配線に含
まれる漂遊インダクタンスの値を小さくするためには、
回路構成の配線i太くし、配線の長さを極力短かくする
ことが重要となる。
In the conventional snubber circuit as described above, in order to reduce the value of stray inductance included in the wiring connecting the rectifier diode, capacitor, and G, T, 0 thyristor,
It is important to make the wiring in the circuit configuration thicker and to keep the length of the wiring as short as possible.

例えば、漂遊インダクタンス12の値Ls10.3μH
以下とするためには、電線の太嘔は3.5−以上管用い
、G、 T、 Oサイリスタの端子間から15α以内に
、整流ダイオードとコンデンサを含む回路を構成しなけ
ればならず、スナバ回路等の部品組立構成上、極めて困
難な問題点があった。
For example, the value of stray inductance 12 Ls10.3μH
In order to achieve the following, the diameter of the wire must be 3.5 - or more, and a circuit including a rectifier diode and a capacitor must be constructed within 15 α between the terminals of the G, T, and O thyristors, and a snubber must be installed. There were extremely difficult problems in the assembly and configuration of parts such as circuits.

この発明はかかる問題点を解決する九めになされtもの
であり、スナバ回路の配線による漂遊インダクタンスを
低減して、半導体スイッチ(G。
This invention is the ninth attempt to solve this problem, and reduces the stray inductance caused by the wiring of the snubber circuit, thereby reducing the stray inductance of the semiconductor switch (G).

T、0サイリスタ)の透析能力を向上させるとともにそ
の回路構成部品の組立が容易なスナバ回路を提供するこ
とを目的とし友ものである。
The purpose of this invention is to provide a snubber circuit which improves the dialysis capacity of a T, 0 thyristor and whose circuit components are easy to assemble.

〔問題点を解決するための手段〕[Means for solving problems]

この発明にがかるスナバ回路は、構成部品であるコンデ
ンサの外箱を電極としたものである。
The snubber circuit according to the present invention uses the outer case of a condenser as a component as an electrode.

〔作用〕[Effect]

この発明においては、上記コンデンサを冷却フィンと直
接接続することにより、スナバ回路に含まれる漂遊イン
ダクタンスの値を10〜50チ程度低減することが可能
で、極小配線に伴う回路構成の困難さを解決するととも
により低いインダクタンスのスナバ回路構成が可能とな
り、G、T、0サイリスタのターンオフ時の透析特性の
向上を促進する。
In this invention, by directly connecting the capacitor to the cooling fin, it is possible to reduce the value of stray inductance included in the snubber circuit by about 10 to 50 inches, solving the difficulty of circuit configuration due to extremely small wiring. At the same time, a snubber circuit configuration with lower inductance is possible, which promotes improvement of the dialysis characteristics when the G, T, and 0 thyristors are turned off.

〔実施例〕〔Example〕

第1図はくの発明のスナバ回路の構成部品であるコンデ
ンサの構成を示す外箱を横断し友正面図にして、1〜4
は上記従来のコンデンサと全く同一の魯ものである。
Fig. 1 shows the structure of a capacitor which is a component of the snubber circuit of the invention.
is exactly the same as the conventional capacitor mentioned above.

コンデンサ本体素子3の両端に設けられt電極2.2に
は端子棒1.1の端部が接続され、その−万の端子棒1
は絶縁体15を介して外箱(導電体)4と絶縁されて外
部に突出し、他方の端子棒1は外箱内面に取付けられて
該外箱を電極としている。そして、外箱外面には端子1
6が一体的に設けられている。
The ends of the terminal bars 1.1 are connected to the T electrodes 2.2 provided at both ends of the capacitor body element 3, and the terminal bars 1.
is insulated from the outer box (conductor) 4 via an insulator 15 and protrudes to the outside, and the other terminal rod 1 is attached to the inner surface of the outer box, using the outer box as an electrode. There is a terminal 1 on the outside of the outer box.
6 are integrally provided.

第2図は上記コンデンサを用いて、スタック構成した例
を示し友もので、電極としてのコンデンサ外箱に設けた
端子16を直接G、 T、 Oサイリスタ5の端子17
に接続することができるから、電線による配線は不要と
なる。ま友、整流ダイオード6からコンデンサ7への配
線も短かいリード線18で十分である。
FIG. 2 shows an example of a stack configuration using the above capacitors, in which the terminal 16 provided on the outer box of the capacitor as an electrode is directly connected to the terminal 17 of the G, T, O thyristor 5.
Since it can be connected to, there is no need for wiring with electric wires. Friend, a short lead wire 18 is sufficient for wiring from the rectifier diode 6 to the capacitor 7.

第3因は一対の冷却フィン8,8間にG、 T、 0サ
イリスタ5と整流ダイオード6とをその電極19.20
同志が直接接触するように配置し、両者5.6から側方
へ突出寧れた端子17,2.1にコンデンサ7の端子1
6と端子1t−直接接続したもので、電線による配線が
なく、漂遊インダクタンスの低減が前記第2図の場合に
比べてより十分となるうえ、スタック構成が極めてシン
プルになる。
The third factor is that the G, T, 0 thyristor 5 and the rectifier diode 6 are connected between the pair of cooling fins 8, 8 and their electrodes 19, 20.
The terminals 17 and 2.1 of the capacitor 7 are arranged so that they are in direct contact with each other, and the terminals 17 and 2.1 of the capacitor 7 are connected to the terminals 17 and 2.1 that protrude laterally from both terminals 5.6 and 2.1, respectively.
6 and the terminal 1t are directly connected, there is no wire wiring, the stray inductance can be more sufficiently reduced than in the case of FIG. 2, and the stack configuration is extremely simple.

尚、上記の説明では、半導体スイッチとしてG。In the above explanation, G is used as a semiconductor switch.

T。0サイリスタに限定して説明したが、その他のスイ
ッチングデバイス(例えばトランジスタ、サイリスタ)
にも適用できることはもちろんである。
T. 0 thyristor, but other switching devices (e.g. transistors, thyristors)
Of course, it can also be applied to

〔発明の効果〕〔Effect of the invention〕

以上のように、この発明によれば、コンデンサの外箱を
電極としたので、このコンデンサを半導体スイッチおよ
び整流ダイオードと最も近接距離にて接続することがで
きるため、シンプルなスタ□  ツク構成とすることが
できるとともにスナバ回路の主回路配線の漂遊インダク
タンスを低減して、半導体スイッチの透析能力を最大限
に発揮できる。
As described above, according to the present invention, since the outer box of the capacitor is used as an electrode, this capacitor can be connected to the semiconductor switch and the rectifier diode at the closest distance, resulting in a simple stack configuration. At the same time, stray inductance in the main circuit wiring of the snubber circuit can be reduced, and the dialysis ability of the semiconductor switch can be maximized.

また、スナバ回路等の構成部品の機構設計の困難路も容
易に解決することが可能であるという効果がある。
Furthermore, it is possible to easily solve difficult mechanical designs of components such as snubber circuits.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明のスナバ回路の構成部品であるコンデ
ンサの外箱を横断し交圧面図、第2図はそのコンデンサ
を用いたスタック構成を示す要部の正面図、第3図はそ
のスタック構成の他の例を示す正面図、第4図は従来の
コンデンサの外箱を横断した正面図、第5図はそのコン
デンサを用いたスタック構成を示す正面図、第6図はス
ナバ回路図、第7図はG、 T、 Oサイリスタのター
ンオフ時の電流、電圧透析波形図である。 4・・・外箱、  5・・・半導体スイン?(ゲートタ
ーンオフサイリスタ)、  6・・・整流ダイオード、
7・・・コンデンサ、  11・・・抵抗、  16・
・・端子。 なお、図中、同一符号は同一または相当部分を示す。 第 11!I 第25ii1 第3図 第 4@ 第5m 9− 糸ピ緩)F&(仲’I、jlJ”’(−り不()
10: スナバn品
Figure 1 is an alternating pressure side view across the outer box of a capacitor that is a component of the snubber circuit of the present invention, Figure 2 is a front view of the main parts showing a stack configuration using the capacitor, and Figure 3 is the stack. A front view showing another example of the configuration, FIG. 4 is a front view across the outer box of a conventional capacitor, FIG. 5 is a front view showing a stack configuration using the capacitor, FIG. 6 is a snubber circuit diagram, FIG. 7 is a diagram of current and voltage dialysis waveforms when the G, T, and O thyristors are turned off. 4...Outer box, 5...Semiconductor switch? (gate turn-off thyristor), 6... rectifier diode,
7... Capacitor, 11... Resistor, 16.
...Terminal. In addition, in the figures, the same reference numerals indicate the same or corresponding parts. 11th! I 25ii1 Figure 3 4 @ 5m 9- Thread loose) F &(Naka'I,jlJ"'
10: Snubber n product

Claims (1)

【特許請求の範囲】[Claims]  負荷に対する供給電力を制御する半導体スイッチと、
この半導体スイッチと並列に接続される整流ダイオード
とコンデンサの直列接続体と、上記整流ダイオードに並
列接続される抵抗とを備えたスナバ回路において、上記
コンデンサの外箱を電極としたことを特徴とする半導体
スイッチのスナバ回路。
a semiconductor switch that controls the power supplied to the load;
A snubber circuit comprising a series connection body of a rectifier diode and a capacitor connected in parallel with the semiconductor switch, and a resistor connected in parallel with the rectifier diode, characterized in that the outer box of the capacitor is used as an electrode. Semiconductor switch snubber circuit.
JP23943384A 1984-11-15 1984-11-15 Snubber circuit of semiconductor switch Pending JPS61119068A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23943384A JPS61119068A (en) 1984-11-15 1984-11-15 Snubber circuit of semiconductor switch

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23943384A JPS61119068A (en) 1984-11-15 1984-11-15 Snubber circuit of semiconductor switch

Publications (1)

Publication Number Publication Date
JPS61119068A true JPS61119068A (en) 1986-06-06

Family

ID=17044699

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23943384A Pending JPS61119068A (en) 1984-11-15 1984-11-15 Snubber circuit of semiconductor switch

Country Status (1)

Country Link
JP (1) JPS61119068A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6377478U (en) * 1986-11-11 1988-05-23
JPH11220869A (en) * 1998-02-02 1999-08-10 Toshiba Transport Eng Inc Power converter

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58112358A (en) * 1981-12-25 1983-07-04 Toshiba Corp Semiconductor stack device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58112358A (en) * 1981-12-25 1983-07-04 Toshiba Corp Semiconductor stack device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6377478U (en) * 1986-11-11 1988-05-23
JPH11220869A (en) * 1998-02-02 1999-08-10 Toshiba Transport Eng Inc Power converter

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