JPS6084638A - Memory card - Google Patents

Abstract

PURPOSE:To find an illegal instruction is executed by writing a specific code at a specific address position, and interrupting a CPU when a program runaway occurs and this code is read out. CONSTITUTION:When memory chips 5 are reset and initialized, the specific code, e.g. code for indicating an internal interruption is written during resetting in the specific address of each memory chip 5 from a code writing circuit 6, and then the chips are initialized after the writing is completed. A program is written in addresses except the addresses wherein said specific code is written. If the program runs away, said specific code is read out and an interruption to the CPU is initiated to detect the runaway of the program. The code of the code writing circuit 6 is not fixed, but set optionally from the outside.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a memory card, and particularly to a memory card configured to cope with program runaway.

[Prior art]

Figure aλ1 is a block diagram showing an example of a conventional memory card, in which (1) is an address determination circuit, (2) is an address and data bus, (3) is an address selection circuit,
(41 is a memory tick selection circuit, (51), (52L
=-(5n) are each a memory tick, and are collectively shown as a memory tick (5). In the example shown in the figure, one memory card is composed of n memory ticks (5), a memory tick selection circuit (4), an address determination circuit (1), and an address selection circuit (31). A memory card is connected to multiple θ address and data buses (2).

When accessing a specific address location of a specific chip of a specific memory card, the address and data bus (2)
In this case, an address signal created by combining a bit pattern for selecting a memory card, a bit pattern for selecting a memory chip, and a bit pattern for indicating an address within a memory tick is placed on the address position part of the address and data bus (2) and sent out. do. 1, the word read from the memory card or the word to be written to the memory card is sent out on the data portion of the address and data bus (21).

In addition, commands such as the REAJJ/WRITE command, which indicates whether to brown the memory card or to continue reading from the memory card, are also transmitted on the command line portion of the address and data bus (2).

A CPU (not shown) corresponding to a storage device 15 constituted by a plurality of memory cards connected to the address and data bus (2) is connected to the address and data bus (2).
It is connected to the.

The address determining circuit (1) creates a bit turn indicating the memory card in question and supplies this to the address selecting circuit (3). The address selection circuit (3) compares the bit turn for selecting a memory card of the address signal placed on the address portion of the address and data bus (2) with the bit pattern given from the address determination circuit (1),
If the two match, it is assumed that the memory card has been accessed and the memory chip selection circuit (41) is activated.The memory chip selection circuit (4) receives the address signal placed on the address section of the address and data bus +21. J depending on the bit pattern selected from the memory chino f@s
H? Only the memory chip f' that has been updated is made operational. The memory chip f'+51 has an address and data bus (2)
The bit pattern indicating the address in the memory tick (51) of the address message placed on the address section of the memory tick is input and the desired word is accessed.READ/WRITE command given in the command line section. Accordingly, the word 1r is read out or the word 1q is filled with waste.

By the way, IIAM that constitutes Memory Natsu (5) is a volatile memory, so if the power is turned off again and the power is turned on again, the conventional memory will disappear and Memory Natsu's record 1; ψ , the content is completely meaningless. In such a case, after turning on the power again, write the necessary program on all memory bits (set all bits to logic "0"). This writing is called initialization, and in normal cases, initialization is performed by writing a program that is stored in a nonvolatile memory into a memory nut.

Conventional memory cards are configured as described above, so when you store a zologram 'C'fh on the memory card and output this zologram 6 to perform data processing, the command statement of the read zologram is (Because a code error occurred due to "J" etc., it became an invalid instruction, and due to this invalid instruction, addresses where no zologram was written, areas where data was heavy, etc.) were generated one after another. If a code is mistakenly recognized as an instruction code and executed, resulting in a runaway of the nologogram, it is difficult to know when or where the runaway occurred.

[Installation of the Invention] This invention was made in order to eliminate the drawbacks of the conventional ones as described above, and in this invention, by using the opportunity to reset and initialize the memory nut, When a program runaway occurs and this specific code is read, all processes must be executed, such as applying CPU VC'fFIJ input (i.e., executing an internal interrupt). This makes it possible to discover that an unauthorized command has been executed.

[Embodiments of the invention] Hereinafter, 11 examples of the fruits of this invention will be explained with reference to all the drawings.

Figure 2 is a block diagram (not shown) of one embodiment of this invention.
The same reference numerals as in the figure indicate the same or corresponding parts. 6) is a code writing circuit.

As explained earlier, memory nuts (5) woriseno[・
When initializing the program, write the code to each memory address (51 to 71!) and the J-circuit (code that instructs all internal interrupts from 61 to 61), and After the generalization is completed, initialization is executed, and the address location (4) excluding the address location where the 'f fixed code is written is written.

By doing this, when the program runs out of control due to the execution of an illegal instruction, the code of the special W mentioned above will be read, and this specific code will be sent to the CPU-\
If the code instructs an interrupt, the program runaway can be detected by interrupting the CPLI.

Note that the specific code written from the code writing circuit is
In addition to interrupt instructions, any code that instructs processing that can detect zologram runaway is welcome.
The code of the code writing circuit (61) may not be fixed, but may be arbitrarily set from the outside.

〔Effect of the invention〕

As described above, according to this invention, when executing the program,
This has the advantage that even if a code used in a program or read from an area other than the header is executed as an instruction code by mistake, it can be detected immediately.

[Brief explanation of drawings]

8+! FIG. 1 is a block diagram showing the entire conventional memory card, and FIG. 2 is a block diagram showing an example of the present invention. (1)...address determination circuit, (21...address and data bus, (31...address selection circuit, (4
)...Memory chinono selection circuit, (5)...Memory chinowo, (6:...Code writing circuit. In addition, the same reference numerals in each figure indicate the same or equivalent parts. Agent: Masuo Oiwa Procedure correction Letter (spontaneous) 1987/Z1” Mr. Commissioner of the Patent Office 1, Indication of the case 'l-1, No. 58-192721
No. 2, Title of the invention: E: Ricart. 3.To the representative of the person making the amendment, Katayuni 4.Representative (1) "Claims" column 7 of the specification; List of attached documents (1) Revised scope of patent claims...・・・・・・
... 1 copy (or more) Attachment 2, 'l'4? ♂I'1liil; Enclosure (1) In a memory card having a plurality of memory chips for storing blocks, a code writing circuit is installed, taking the opportunity to reset and initialize the memory chips, and write each memory chip. After inserting 5t code in advance into a specific address position of the above-mentioned address position, store the program in the part of the above-mentioned memory chip except for the above-mentioned specific address position IN, and then install the above-mentioned memory chip. A memory cart comprising: means for initializing; and means for executing an instruction instructed by the predetermined code when the predetermined code is read. (2) A special W characterized in that the predetermined code is a processing instruction code that can detect runaway internal interrupt instructions, etc.
F Claim 11λ 1st river I self-loaded memory card.

Claims (2)

[Claims] (1) In a memory card that has several memory chips fk"FM that store zolograms, set up a code writing circuit and use the opportunity to reset and initialize the above memory chips to write the above code to a specific address position of each memory chip. After writing a predetermined code from a code writing circuit, means for initializing the memory chip by writing a zologram into a portion of the memory chip excluding the specific address position, and reading out the predetermined code. and means for executing instructions instructed by the code. (2) The memory card according to claim 1, wherein the predetermined code is a code that instructs all internal interrupts.