JPS6072345A - デイジタル信号位相同期回路 - Google Patents
デイジタル信号位相同期回路Info
- Publication number
- JPS6072345A JPS6072345A JP58178283A JP17828383A JPS6072345A JP S6072345 A JPS6072345 A JP S6072345A JP 58178283 A JP58178283 A JP 58178283A JP 17828383 A JP17828383 A JP 17828383A JP S6072345 A JPS6072345 A JP S6072345A
- Authority
- JP
- Japan
- Prior art keywords
- phase
- output
- clock
- signal
- input signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0331—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58178283A JPS6072345A (ja) | 1983-09-28 | 1983-09-28 | デイジタル信号位相同期回路 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58178283A JPS6072345A (ja) | 1983-09-28 | 1983-09-28 | デイジタル信号位相同期回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6072345A true JPS6072345A (ja) | 1985-04-24 |
| JPH0342737B2 JPH0342737B2 (enrdf_load_stackoverflow) | 1991-06-28 |
Family
ID=16045756
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58178283A Granted JPS6072345A (ja) | 1983-09-28 | 1983-09-28 | デイジタル信号位相同期回路 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6072345A (enrdf_load_stackoverflow) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62269531A (ja) * | 1986-05-19 | 1987-11-24 | Hitachi Ltd | 同期信号抽出回路 |
| JPS6345934A (ja) * | 1986-03-31 | 1988-02-26 | Nec Corp | ビツト同期回路及び方法 |
| JPS63229934A (ja) * | 1987-03-19 | 1988-09-26 | Fujitsu Ltd | タイミングpll方式 |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56116755U (enrdf_load_stackoverflow) * | 1980-02-05 | 1981-09-07 |
-
1983
- 1983-09-28 JP JP58178283A patent/JPS6072345A/ja active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56116755U (enrdf_load_stackoverflow) * | 1980-02-05 | 1981-09-07 |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6345934A (ja) * | 1986-03-31 | 1988-02-26 | Nec Corp | ビツト同期回路及び方法 |
| JPS62269531A (ja) * | 1986-05-19 | 1987-11-24 | Hitachi Ltd | 同期信号抽出回路 |
| JPS63229934A (ja) * | 1987-03-19 | 1988-09-26 | Fujitsu Ltd | タイミングpll方式 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0342737B2 (enrdf_load_stackoverflow) | 1991-06-28 |
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