JPS6068611A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To enable stably control the quantity diffusion on a diffusion region by a method wherein impurities are brought to the boundary of a semiconductor film and a semiconductor substrate by performing an ion implantation using electrically inactive impurities, and then electrically active impurity diffusion is generated by performing a heat treatment. CONSTITUTION:The contact part of a base 16 is selectively left on a P type Si substrate 11, and polysilicon 17-19 are selectively left on an emitter forming part and a collector contact part. Besides, after a resist film 20 has been covered on the above-mentioned parts, excluding the emitter and collector regions, by performing a photolithographic method, As ions are introduced into the emitter region and the polysilicon 18 and 19 of the collector contact part. Subsequently, Si ions 21 are implanted and damage is given to the interface of the polysilicon 18, a silicon interface 22 and the polysilicon 19. Then, an emitter region 24 and a collector contact region 25 are formed by performing a diffusion on the emitter using a heat treatment. The value of current amplification factor is brought in a stabilized state when Si ions 21 exceed 10<13>cm<-2> or thereabout, and the interface of polysilicon and silicon is brought in a stabilized state.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for stabilizing impurity diffusion in a semiconductor device.

Conventional Structure and Problems There is a conventional method in manufacturing semiconductor devices in which impurities are diffused into a single crystal silicon substrate through polysilicon. An example of the prior art will be explained with reference to FIG.

A window is opened in the silicon oxide film 2 at the emitter formation portion on the silicon substrate 1, and polysilicon 3 is deposited (
Figure 1 a). From above, arsenic ions and boron ions serving as emitter impurities are diffused to form an emitter region 4 and a base region 5 (FIG. 1b).

However, in the above method, the presence of a natural oxide film at the boundary between polysilicon and silicon causes abnormalities, especially as it acts as a barrier to arsenic diffusion, making it difficult to control the current amplification factor of the formed transistor with good reproducibility. is difficult. This poses a problem in forming highly accurate integrated circuits. The anomalous diffusion phenomenon at this interface will be explained using the results of measuring the depth distribution of atoms using an ion microanalyzer.

Figure 2 shows Q, 2 on (111) direction 0) S i
After depositing pm polysilicon, As ions were heated to 6°K.
eV, 1o cIn ion implantation, 1000℃, 20
This is the result of As concentration distribution 6 after heat treatment in N2 for 30 minutes. The horizontal axis is the depth from the surface, and a pile amplifier of arsenic occurs on the polysilicon side at the interface, resulting in a decrease in the amount of arsenic diffused into the single crystal silicon. Further, even when arsenic atoms that have been diffused into the single crystal are diffused toward the polysilicon side, the amount of arsenic atoms that diffuse across this interface rapidly decreases.

OBJECTS OF THE INVENTION In view of these conventional problems, the present invention provides a method for increasing the stability of the interface between polysilicon and silicon and for stabilizing the characteristics of a semiconductor device manufactured using this. It is particularly effective in stabilizing arsenic diffusion in the formation of emitters of bipolar transistors and in stabilizing diffusion in contact portions of hypopolysilicon resistors.

Structure of the Invention The present invention exposes the substrate surface to an impurity diffusion region on a semiconductor substrate, deposits a semiconductor film (polysilicon or amorphous silicon), and then introduces diffusion impurities and ions by electrically inactive impurities. The impurity is implanted to reach the boundary between the semiconductor film and the semiconductor substrate. Thereafter, heat treatment causes electrically active impurity diffusion to form a diffusion region of a semiconductor device. Here, it becomes possible to stably control the amount of diffusion by changing the amount of impurity in the ion implantation.

DESCRIPTION OF EMBODIMENTS Embodiments of the present invention will now be described in detail using embodiments relating to the manufacture of bipolar integrated circuits.

In FIG. 3a, an n+ buried layer 12 is formed on a P type (111) Si substrate 11, and a P+ tunnel stripper region 16 is also formed. After forming the pn-type epitaxial region 13, element isolation 14 is performed, and the base p-type diffusion region 16 is
, and polysilicon 17.18.1 is formed on the contact part of the base 16, the emitter formation part, and the collector contact part.
9 is selectively left at a thickness of 0.3 μm. Furthermore, here,
After covering the resist film 2o except for the emitter and collector regions by photo-soliding, As ions were heated at 60KeV.
10 C was introduced by ion implantation with an acceleration energy of 10 C into the polysilicon 18 and 19 of the emitter and collector contact portions. After that, S1 ion 21
lx10"C non-n-2 implantation is performed at 100 KeV to damage the polysilicon 18 and the silicon interface 22. In this case, the polysilicon 19 interface is also damaged.

Next, as shown in Figure 2, after ion implantation, the
The emitter is diffused by heat treatment for 20 minutes to form an emitter region 24 and a collector contact region 25. 26
are the vane, emitter, and collector electrodes.

Note that the ion implantation can also be more effective by using inert ions such as carbon, fluorine, argon, etc. other than the above-mentioned St. Furthermore, the order of the As ion implantation and the ion implantation of these inactive ions may be either.

FIG. 4 shows a graph of the current amplification factor of the L transistor fabricated by the above method as a function of the amount of silicon implanted. The horizontal axis shows the amount of silicon ion implanted, and the vertical axis shows the current amplification factor of the transistor. When no inert ions are implanted, the reproducibility is poor and the values vary widely from 30 to 70. When it exceeds about 10'' CIl+-2, it becomes a stable value and the polysilicon-silicon interface becomes stable.

FIG. 5 shows the concentration distribution of As in the depth direction corresponding to FIG. 2. In this case, the Si implantation was performed at 100 K e V.
Injected with 10C7X iono. Abnormal precipitation at the interface between polysilicon and silicon no longer occurs.

Effects of the Invention By the method of the present invention, the state of impurity diffusion at the poly-IJO-silicon interface could be stabilized, and a highly accurate integrated circuit element could be formed.

[Brief explanation of drawings]

Figures 1 (a) and <b) are cross-sectional views of the conventional diffusion process into polysilicon and silicon, Figure 2 is a diagram showing the depth concentration distribution of As atoms in conventional polysilicon, and Figure 3 is a diagram showing the depth concentration distribution of As atoms in conventional polysilicon. (a) and (b) are cross-sectional views of the emitter formation process of a transistor according to an embodiment of the present invention, FIG. As in polyrecon silicon of the invention
FIG. 3 is a diagram showing the depth concentration distribution of atoms. 18... Poly-Si emitter, 21... S1 ion beam, 22... Emitter diffusion layer. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 3
Figure 4 Figure 5 t4X t Input Figure 5 Maintenance N (pm)

Claims (1)

[Claims] A process of forming a semiconductor thin film on a semiconductor substrate, a process of implanting electrically inactive ions until they reach the interface between the semiconductor thin film and the semiconductor substrate, and a process of diffusing electrically active atoms through the interface. A method for manufacturing a semiconductor device, comprising: