JPS606244U - Mold package type semiconductor device - Google Patents

Mold package type semiconductor device

Info

Publication number
JPS606244U
JPS606244U JP9902783U JP9902783U JPS606244U JP S606244 U JPS606244 U JP S606244U JP 9902783 U JP9902783 U JP 9902783U JP 9902783 U JP9902783 U JP 9902783U JP S606244 U JPS606244 U JP S606244U
Authority
JP
Japan
Prior art keywords
semiconductor device
type semiconductor
package type
mold package
container body
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9902783U
Other languages
Japanese (ja)
Inventor
誠 行方
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP9902783U priority Critical patent/JPS606244U/en
Publication of JPS606244U publication Critical patent/JPS606244U/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は従来の外形例を示す図、第２図は第１図の外形
の半導体素子をプリント基板は装着する状況を示す図、
第３図は本考案の一実施例を示す図、第４図、第５図は
第３図の半導体素子の内部構造を示す図である。 １・・・・・・ベースリード、２・・・・・・コレクタ
リード、３・・・・・・エミッタリード、４・・・・・
・取付穴、５・・・・・・内部連結線、６・・・・・・
ペレット。FIG. 1 is a diagram showing an example of a conventional external shape, and FIG. 2 is a diagram showing a situation in which a semiconductor element having the external shape of FIG. 1 is mounted on a printed circuit board.
FIG. 3 is a diagram showing an embodiment of the present invention, and FIGS. 4 and 5 are diagrams showing the internal structure of the semiconductor device shown in FIG. 3. 1...Base lead, 2...Collector lead, 3...Emitter lead, 4...
・Mounting hole, 5... Internal connection line, 6...
pellet.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 容器本体より突出せる軸対称の二組の同一電極リードと
、容器本体に設けた軸対称の二つの取付穴とを有するこ
とを特徴とするモールド・パッケージ形半導体素子。What is claimed is: 1. A molded package type semiconductor device characterized by having two sets of axially symmetrical identical electrode leads protruding from a container body and two axially symmetrical mounting holes provided in the container body.
JP9902783U 1983-06-27 1983-06-27 Mold package type semiconductor device Pending JPS606244U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9902783U JPS606244U (en) 1983-06-27 1983-06-27 Mold package type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9902783U JPS606244U (en) 1983-06-27 1983-06-27 Mold package type semiconductor device

Publications (1)

Publication Number Publication Date
JPS606244U true JPS606244U (en) 1985-01-17

Family

ID=30234854

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9902783U Pending JPS606244U (en) 1983-06-27 1983-06-27 Mold package type semiconductor device

Country Status (1)

Country Link
JP (1) JPS606244U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63285414A (en) * 1987-05-18 1988-11-22 Sumitomo Electric Ind Ltd Sensor structure

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63285414A (en) * 1987-05-18 1988-11-22 Sumitomo Electric Ind Ltd Sensor structure

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