JPS6061611U

JPS6061611U - Pulse generation circuit for each rotation direction

Info

Publication number: JPS6061611U
Application number: JP15401983U
Authority: JP
Inventors: 慎治小林
Original assignee: 横河電機株式会社
Priority date: 1983-10-04
Filing date: 1983-10-04
Publication date: 1985-04-30

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of drawings]

第１図は従来回路を用いた位置検出装置の一例を示す接
続図、第２図はその動作説明のためのタイムチャート、
第３図は本考案回路の一実施例を示す接続図、第４図お
よび第５図はその動作説明のためのタイムチャートであ
る。１・・・モータ、２・・・エンコーダ、３・・・矩形波
信号発生回路、４・・・回転方向別パルス発生回路、５
・・・アップダウンカウンタ、ＥＸＯＲ１〜ＥＸＯＲ３
・・・排他的オアゲート、■■１〜ＩＶ３・・・インバ
ータ、ＡＮＤ工〜ＡＮＤ、・・・アンドゲート、ＯＲ，
、ＯＲ２・・・オアゲート。Fig. 1 is a connection diagram showing an example of a position detection device using a conventional circuit, Fig. 2 is a time chart for explaining its operation,
FIG. 3 is a connection diagram showing one embodiment of the circuit of the present invention, and FIGS. 4 and 5 are time charts for explaining its operation. DESCRIPTION OF SYMBOLS 1... Motor, 2... Encoder, 3... Rectangular wave signal generation circuit, 4... Pulse generation circuit according to rotational direction, 5
...up/down counter, EXOR1 to EXOR3
...Exclusive OR gate, ■■1~IV3...Inverter, AND engineering~AND, ...And gate, OR,
, OR2...or gate.

Claims

[Scope of utility model registration request]

Rectangular wave signals A and B obtained by waveform shaping encoder outputs that are out of phase with each other by 906, and these rectangular wave signals A,
Rectangular wave signals A' each delayed by a certain time T from B.
, B' are input, and the pulse P1. a first exclusive OR gate to which the rectangular wave signals A' and B' are input; and a second exclusive OR gate to which the rectangular wave signals A and B' are input; a third exclusive OR gate to which the rectangular wave signals A and B are input; a first inverter to which the output of the first exclusive OR gate is input; and a first inverter to which the output of the second exclusive OR gate is input. a second inverter to which the output of the third exclusive-OR gate is input;
a first AND gate to which the output of the first inverter and the outputs of the second and third exclusive OR gates are respectively input; a second AND gate to which the outputs of the exclusive OR gates are respectively input; a third AND gate to which the outputs of the third inverter and the eleventh second exclusive OR gate are respectively input; 2. A fourth AND gate to which the output of the third inverter and the output of the first exclusive OR gate are respectively input; and a first OR gate to which the outputs of the first and third AND gates are input. , and a second OR gate into which the outputs of the second and fourth AND gates are input, and the outputs of the first and second OR gates are provided with pulses P1- for each rotational direction.
A pulse generation circuit according to rotation direction, characterized in that it generates P2.