JPS58183096U - Servo motor control circuit - Google Patents

Servo motor control circuit

Info

Publication number
JPS58183096U
JPS58183096U JP7851082U JP7851082U JPS58183096U JP S58183096 U JPS58183096 U JP S58183096U JP 7851082 U JP7851082 U JP 7851082U JP 7851082 U JP7851082 U JP 7851082U JP S58183096 U JPS58183096 U JP S58183096U
Authority
JP
Japan
Prior art keywords
reverse
pulse
servo motor
pulse train
generates
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7851082U
Other languages
Japanese (ja)
Inventor
春原 出
Original Assignee
株式会社リコー
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社リコー filed Critical 株式会社リコー
Priority to JP7851082U priority Critical patent/JPS58183096U/en
Publication of JPS58183096U publication Critical patent/JPS58183096U/en
Pending legal-status Critical Current

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  • Control Of Direct Current Motors (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来からサーボモータに取付けられているエン
コーダの一例の概略構成を示す斜視図、第2図はこの考
案のパルスモータ制御回路の一実施例を示すブロック図
、第3図は第2図の回路の動作を説明するためのタイム
チャートである。 図面において、1はサーボモータ、2はエンコーダの回
転板、3Aと3Bは発光素子、4Aと4Bは受光素子、
5と6は079717071回路、11はリドリガーM
/M、12〜15はJKフリップフロップ回路を示す。
FIG. 1 is a perspective view showing a schematic configuration of an example of an encoder conventionally attached to a servo motor, FIG. 2 is a block diagram showing an embodiment of the pulse motor control circuit of this invention, and FIG. 3 is a time chart for explaining the operation of the circuit shown in the figure. In the drawing, 1 is a servo motor, 2 is an encoder rotating plate, 3A and 3B are light emitting elements, 4A and 4B are light receiving elements,
5 and 6 are 079717071 circuits, 11 is Ridriger M
/M, 12 to 15 indicate JK flip-flop circuits.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] サーボモータの回転に同期して約906位相の異なる2
相のパルス信号を発生するエンコーダと、このエンコー
ダに接続されて、1相の立上り時または立下り時に他相
が所定のレベルにあるとき、サーボモータの回転方向を
弁別する正転パルスまたは逆転パルスを発生する正逆転
パルス発生回路と、このパルス発生回路から出力される
正逆転パルス列を時系列で記憶するパルス列記憶手段と
、このパルス列記憶手段に接続されて、正逆転パルスが
混在するとき、異常発生を指示する出力信号を発生する
ゲート回路と、前記正逆転パルス発生回路へ接続されて
、正逆転パルス列が所定間隔以上入力されないとき異常
発生を指示する出力信号を発生する異常検出回路とを備
えたことを特徴とするサーボモータ制御回路。
2 with approximately 906 different phases in synchronization with the rotation of the servo motor
An encoder that generates a phase pulse signal, and a forward rotation pulse or reverse rotation pulse that is connected to this encoder and discriminates the rotation direction of the servo motor when the other phase is at a predetermined level when one phase rises or falls. A forward/reverse pulse generation circuit that generates a forward/reverse pulse train, a pulse train storage means that stores the forward/reverse pulse train outputted from this pulse generation circuit in time series, and a pulse train storage means that is connected to the pulse train storage means to detect an abnormality when forward/reverse pulses are mixed. A gate circuit that generates an output signal that instructs the occurrence of an abnormality, and an abnormality detection circuit that is connected to the forward/reverse pulse generation circuit and generates an output signal that instructs the occurrence of an abnormality when a forward/reverse pulse train is not input for a predetermined interval or more. A servo motor control circuit characterized by:
JP7851082U 1982-05-28 1982-05-28 Servo motor control circuit Pending JPS58183096U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7851082U JPS58183096U (en) 1982-05-28 1982-05-28 Servo motor control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7851082U JPS58183096U (en) 1982-05-28 1982-05-28 Servo motor control circuit

Publications (1)

Publication Number Publication Date
JPS58183096U true JPS58183096U (en) 1983-12-06

Family

ID=30087716

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7851082U Pending JPS58183096U (en) 1982-05-28 1982-05-28 Servo motor control circuit

Country Status (1)

Country Link
JP (1) JPS58183096U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007232817A (en) * 2006-02-28 2007-09-13 Nidec-Shimpo Corp Rotary drive unit and color image forming apparatus using the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007232817A (en) * 2006-02-28 2007-09-13 Nidec-Shimpo Corp Rotary drive unit and color image forming apparatus using the same

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