JPS5994440U - pulse width modulation circuit - Google Patents
pulse width modulation circuitInfo
- Publication number
- JPS5994440U JPS5994440U JP18897582U JP18897582U JPS5994440U JP S5994440 U JPS5994440 U JP S5994440U JP 18897582 U JP18897582 U JP 18897582U JP 18897582 U JP18897582 U JP 18897582U JP S5994440 U JPS5994440 U JP S5994440U
- Authority
- JP
- Japan
- Prior art keywords
- pulse width
- counter
- width modulation
- modulation circuit
- preset
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Feedback Control In General (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図および第２図は本考案のパルス幅変調回路の一実
施例を示す構成図およびその動作を説明するための波形
図である。
ＰＲＣ・・・・・・プリセットカウンタ、ＣＮＴ・・・
・・・カウンタ、ＯＲ・・・・・・オア回路、ＩＮＶ・
・・・・・反転制御回路、Ｓｅ・・・・・・誤差信号、
ＣＬ・・・・・・クロックパルス。FIGS. 1 and 2 are a block diagram showing an embodiment of the pulse width modulation circuit of the present invention and a waveform diagram for explaining its operation. PRC...Preset counter, CNT...
・・・Counter, OR・・・OR circuit, INV・
...Inversion control circuit, Se...Error signal,
CL...Clock pulse.
Claims (1)
れるプリセットカウンタと、通常のカウンタと、これら
両カウンタにおけるｎ桁目の出力を論理演算してパルス
幅信号を発生する論理回路−とを具備し、前記プリセッ
トカウンタおよびカウンタに共通のクロックパルスを供
給するとともに、前記カウンタにおける（ｎ＋１）桁目
の出力により両カウンタをプリセットおよびリセットす
るようにしてなるパルス幅変調回路。It is equipped with a preset counter to which a digital input signal is applied as a preset value, a normal counter, and a logic circuit that performs a logical operation on the n-th digit outputs of these two counters to generate a pulse width signal. A pulse width modulation circuit that supplies a common clock pulse to a preset counter and a counter, and presets and resets both counters by the output of the (n+1)th digit of the counter.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18897582U JPS5994440U (en) | 1982-12-14 | 1982-12-14 | pulse width modulation circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18897582U JPS5994440U (en) | 1982-12-14 | 1982-12-14 | pulse width modulation circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5994440U true JPS5994440U (en) | 1984-06-27 |
Family
ID=30407548
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18897582U Pending JPS5994440U (en) | 1982-12-14 | 1982-12-14 | pulse width modulation circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5994440U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54158847A (en) * | 1978-04-24 | 1979-12-15 | Tektronix Inc | Da converter |
-
1982
- 1982-12-14 JP JP18897582U patent/JPS5994440U/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54158847A (en) * | 1978-04-24 | 1979-12-15 | Tektronix Inc | Da converter |
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