JPS6060783A - Manufacture of superconducting circuit device - Google Patents

Abstract

PURPOSE:To eliminate the discontinuity due to the level-difference parts of electrodes by levelling the surface by arranging the adjacent superconducting electrodes in parallel to a substrate with contacting with the substrate and surrounding the side plane of the superconducting electrodes with an insulating layer so as to make it a flat structure. CONSTITUTION:The Nb layer 25' which will become the first superconductive electrode 25 is formed on a substrate 24 and is patterned by using a mask 31 to become the electrode 25. Next, a tunnel barrier 26 is formed on a surface of the electrode 25 and the Nb layer 27' which will become the second superconducting electrode 27 is deposited with being in contact with said barrier 26. Then, a resist layer 28 is formed and is levelled. Next, etching is done for levelling with leaving the first and second superconducting electrodes 25 and 27 of 1mum, for example. When anodizing is performed by using a mask 29 formed by resist, an insulating layer 30 of Nb2O5 is formed in the Nb layer which is not covered with the mask and the isolation of elements is done.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a superconducting circuit device, and more particularly to a superconducting circuit device having a superconducting tunnel barrier.

For example, a superconducting circuit device can be found in the literature Bronfing of the Society (ProceedingSof+) 1e.
IEEE) Vol, 55NQ2February 19
67PP, 172 180 or USP 4,334,158.

FIGS. 1A and 7B are diagrams for explaining one conventional example of a superconducting circuit device. In FIG. 1(a), a superconducting base electrode 2 is formed on a substrate 1, and an insulating layer 3 is formed on its surface.
A region of the tunnel barrier 4 is defined by using a VC superconducting counter electrode 5 which is in contact with the tunnel wound wall 4. In FIG. 1(b), a first superconducting layer 7 is formed on a substrate 6, and an insulating layer 9 is used on its surface to define a region of a first tunnel barrier 8. A second superconducting electrode 4 is formed as a pole 10 in the contacting portion, and an insulating layer 12 is used on the surface of the second superconducting electrode 100 to define a second tunnel barrier 1]. A third superconducting electrode 13 is formed in a portion that is in contact with the tunnel barrier 11.

As shown in the above two examples 1', the conventional method using a tunnel barrier! 73 In the conductive circuit device, since the first superconducting electrode and the insulating layer except for poles 2 and 7 are formed over the stepped portions of the respective bases, at the stepped portions, The structure was such that discontinuities were likely to occur in each of the superconducting electrodes and insulating layers, resulting in a decrease in yield and reliability of the device. In addition, in order to ensure the continuity of each superconducting electrode or insulating layer at the step, the thickness of each layer must be thicker than the step that they need to cross. There were restrictions. Furthermore, during a thermal cycle between room temperature and 42°, compressive stress or tensile stress is generated in the superconducting electrode in a direction parallel to the substrate due to the difference in thermal expansion coefficient between the substrate and the superconducting electrode. For example, it is reported in the literature IBEE Transactions on Electronic Devices that so-called cracks and rips occur that attack the tunnel barrier, leading to deterioration of the tunnel barrier.
nsactionon EIac+ron Devic
e) ED-271410PP, ]979-19871
It was reported in 980.

FIG. 2 is a diagram for explaining another conventional example of a superconducting circuit device. In FIG. 2, a superconducting base electrode 15 is provided on a substrate 14, an insulating layer 6 is provided on the main surface excluding the side surfaces, and a tunnel barrier 17 is provided on the side surfaces of the superconducting base electrode 15. , a counter electrode ]8 is provided in contact with the tunnel barrier 17.

In the conventional superconducting circuit device using the tunnel barrier shown in the above example, the counter electrode 18 is formed over the step portion formed in the base, so the counter electrode 18 tends to be discontinuous at the step portion, and the device This structure was likely to lead to a decrease in yield and reliability.

An object of the present invention has been made in view of the above-mentioned structural disadvantages, and it is an object of the present invention to provide a method for manufacturing a superconducting circuit device that realizes a planar structure.

According to the present invention, there are a step of forming a first superconductor in an island shape in contact with a desired substrate, a step of forming a tunnel barrier on the entire surface of the first superconductor, and a step of forming a tunnel barrier on the entire surface of the first superconductor. A second superconductor is formed in contact with the substrate, and when the second superconductor is in direct contact with the substrate and G ;The first part is in direct contact with the board.
The #71 conductor of the VC is characterized by including a step of leaving the superconductors so that their Iγ values are equal, and a step of electrically separating the first and second VC superconductors, respectively. The method for manufacturing a superconducting circuit device is as follows: 1.

The present invention will be explained below using the drawings. Figure 3(a)~
Is (e) the invention? It is a diagram for explaining, and is a structural cross-sectional view in the main process of manufacturing a superconducting circuit device. Figure 3(a)
As shown in the figure, the superconducting electrode 20 of the flute 1 is formed in the form of an island in contact with a desired substrate 19. Next, as shown in FIG. 3(b), a tunnel barrier i21 is formed on the surface of the first conductive electrode 200. [After 2, the second b as shown in Figure 3(C)
After the conductive electrode 22 is provided so as to be in contact with the tunnel barrier 21, the second superconducting electrode and the first superconducting electrode are removed to realize the structure shown in FIG. 3(d).

Furthermore, the first superconductor 1! An electrically isolated insulating layer 23 is formed within the second superconducting electrode. Through the above steps, the superconducting electrodes, connecting wires between elements, and insulating layers can be removed, and the stepped portion on the main surface of the device can be eliminated. 8i method will be replaced.

Therefore, the continuity of superconducting electrodes, connecting wires, and insulating layers is improved. Furthermore, during thermal cycles between room temperature and 42°, the difference in thermal expansion coefficients between the substrate and the 1B conduction electrode 1. Even if compressive or tensile stress is generated by N in the direction parallel to the substrate in the superconducting electrode, the tunnel barrier is placed in a plane almost perpendicular to the direction of the force, so the tunnel It is possible to prevent tunnel barriers caused by the formation of so-called hillocks that block barriers. Further, the present invention can realize high yield and high F1 reliability in a superconducting circuit device using a tunnel barrier, and furthermore, can easily realize a device having a multilayer structure.

Next, in order to better understand the present invention, the present invention will be explained with reference to examples. 4th page 4(a) to (11) are diagrams illustrating a method for manufacturing a Josephine transducer circuit as an embodiment of the present invention, and show cross-sectional structures in main steps.

In the same figure, Nb1iH25', which will become the first superconducting electrode 25, is placed on the substrate 24 using, for example, N, b, with a thickness of 1
．． 5 .mu.m thick (FIG. 4(a)), and patterning is performed using, for example, a photoresist mask 31 to form the necessary first superconducting electrode 25 (FIG. 4(a)).
b)). Alternatively, a tunnel barrier 26 is formed on the surface of the second first M3 conductive electrode 250 by, for example, a discharge oxidation method.
Figure (C)). This process is not limited to the discharge oxidation method, but can also be used, for example, by depositing it on the entire aSifC device and using it as a tunnel barrier. Then tunnel barrier 2
6 becomes the second superconductor @127VC, J/
Il is Nb f427' f deposition thread (414th (d
+). (1) After that, a photoresist layer 28 is formed using, for example, AZ-1350J7 photoresist. Due to its own viscosity, this photoresist 128 is applied thickly to the recesses and thinly to the six areas, and as a result, the main surface of the photoresist layer 28 is flattened (FIG. 4(e)). AZ
-1350J 7, the etching rate ratio between the resist and Nb is cr' in reactive sputter etching using CF gas, and is 1 when the gas pressure is 30 mTorr or less, and if etching is performed under these conditions, the etching rate is 1. The plane becomes parallel to the flattened major surface. In this case, since the thickness of the tunnel barrier 26 is the number of heights +^, the time required for etching is only about 1 second, which can be ignored compared to the Nb etching speed ratio of 1500λ/min. As a result, the first and second superconducting electrodes 25
, 27, leaving a thickness of, for example, 1 μm.

After finishing the cutting, the main surface of the device is flattened.

Thereafter, a mask 29 is formed using photoresist, for example, for the portion VC to be left as an element (FIG. 4(g)), positive 4? g When oxidation is applied, Nb is added to the Nb layer not covered by the mask.
, O, are formed, and element isolation is performed as shown in FIG. 4(h).

FIGS. 5(a) to 5(k) are diagrams for explaining the manufacture of a circuit including an element using two or more superconducting tunnel barriers as another embodiment of the present invention, and show structural cross-sectional views in main steps. . In the same figure, a layer 125' of Nl (Nl), which will become the first superconducting pole 125 using Nb, for example, is provided on the base plate 124 to a thickness of, for example, 15 μm (FIG. 5(a)).
For example, patterning is performed using a photoresist mask 133 to form the necessary first (1) superconducting electrode 125 (FIG. 5(b)). First tunnel barrier 126 according to the method
Form ft (51st prisoner (C)).

This process is not limited to the discharge oxidation method; for example, it is also possible to deposit a Si over the entire device and use it as a tunnel barrier. Thereafter, a conductive electrode 127, for example, N
l) Deposit l, , <127' (Fig. 5(d)
). Thereafter, patterning is performed using, for example, a photoresist mask to form a portion to become the second superconducting electrode 27. (FIG. 5(e)) Thereafter, a second tunnel barrier 128 is formed on the surface of the superconducting electrode 127 described above by, for example, an oxidation method (FIG. 5(f)). In addition to the oxidation method, for example, it is also possible to deposit a Si over the entire device and use it as a tunnel barrier. Thereafter, a third superconducting electrode is formed in contact with the second tunnel barrier 128, for example, NbJ 129.
' is deposited (Fig. 5(g)). After that, the analogy is AZ-1
Photoresist layer 1 using 350J photoresist
form 30.

This photoresist) Ji130 has a Q due to its own viscosity.
The photoresist layer 130 is coated thickly on the edges and thinly on the convex curves, and as a result, the main surface of the photoresist layer 130 is flattened (see Figure 5).
h)). The etching rate ratio between AZ-1350J photorenost and Nb was determined by CF, gas pressure, and CIi', gas pressure 30 mTnr.
Below r, it is approximately 1, and if etching is performed under these conditions, the etched surface will be a plane parallel to the flattened main surface. Tunnel disorder α! For products No. 128 and No. 126, the thickness of the tunnel barrier is several tens of mm high, so the etching time is only a few millimeters, and the etching speed ratio of Nb is 15.
Ignore for 0OA per minute. As a result of the seventh step, the first, second and third 1B conductive electrodes 125, 127, 129 are left with a thickness of 1 μm. When etching is completed, the main surface of the device is flattened. (Fig. 5 (i)) After that, a mask 134 is formed using photoresist, for example, in the part to be left as an element (Fig. M5 (J)), and when anodization is performed, the Nb layer not covered with the mask is covered with Nl), O , an insulating layer 132 is formed, and element isolation is performed as shown in FIG. 5 (kloc).

Although the explanation has been made based on the above embodiments, according to the present invention, the second superconducting electrode is formed so as to be in contact with the first superconducting electrode whose surface is provided with a tunnel barrier, and the device surface is made flat. After etching, etching is performed under etching conditions such that the etched plane is parallel to the substrate, and then the elements are separated so that adjacent superconducting electrodes are in contact with the substrate through a tunnel barrier and in a direction parallel to the substrate surface. It is possible to realize a superconducting circuit device with a planar structure in which the side surfaces of the superconducting electrodes are surrounded by an insulating layer.

[Brief explanation of the drawing]

FIGS. 1(a) and 1(b) are structural sectional views of a superconducting circuit device for explaining the conventional technology. FIG. 2 is a diagram showing the structure of a superconducting circuit device to explain the conventional technology. tJr, Figures 3 (a) to (, 1 are structural cross-sectional views in the main process of manufacturing a super-circuit circuit device, which are diagrams for explaining the present invention in detail. Figures 4 (a) to () Fig. 5 (h) is a diagram for explaining one embodiment of the present invention, and is a structural sectional view in the main cost process of manufacturing a Josephson element circuit. This is a diagram for explaining an example, and is a side view of the structure IIJi in the main process of manufacturing a circuit including an element using two superconducting tunnel barriers. is the substrate, 2, 7, 15.20 is the first superconducting electrode, 3, 9,
12, 16.23 are insulating layers, 418.11, 17.21
is the tunnel barrier, 5,10°18.22 is the second superconducting electrode, 13 is the third superconducting electrode, 25', 125'
ii Nb layer to become the first B conduction electrode, 25, 1
25 is the first superconducting Nb electrode, 28 , 29 , 31
, 133, 131 and 130 are photoresist layers;
27' and 127' are Nb which should become the second superconducting electrode
layer, 27, 127 is the second superconducting Nb1E pole, 26
, 126Vi first tunnel barrier, 128 second tunnel barrier, 30, 132 Nb2O insulating layer, 12
9' is the Nb layer that should become the third superconducting electrode. 129 is the third superconducting electrode. E 1 Figure (a) 11 87 (b) Figure 2 161 Burnt Figure 3 (a) (d) (b) (e) (C) Fang 4 Figure 1 ZZ U"-"-""'-" −””−”−” Soak※※ (d) (h) Figure 5 (d) Figure 5 (h) (k) 9p (i) 1st 1

Claims (1)

[Claims] A step of forming a first superconductor in an island shape in contact with a desired substrate, and a step of forming a tunnel barrier on the entire surface of the first superconductor, - -゛, a step of forming a second superconductor in contact with the tunnel barrier, scraping off the second superconductor, and then scraping off the second superconductor and the first superconductor; , the second superconductor is placed directly on the substrate,
The first superconductor is in direct contact with the substrate.
A superconductor characterized by comprising the steps of: leaving only the first and second superconductors so that their thicknesses are equal, and then electrically separating the first and second superconductors, respectively. A method for manufacturing a conductive circuit device.