JPS6060740A - Resin-sealed semiconductor device - Google Patents
Resin-sealed semiconductor deviceInfo
- Publication number
- JPS6060740A JPS6060740A JP16966083A JP16966083A JPS6060740A JP S6060740 A JPS6060740 A JP S6060740A JP 16966083 A JP16966083 A JP 16966083A JP 16966083 A JP16966083 A JP 16966083A JP S6060740 A JPS6060740 A JP S6060740A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- package
- thickness
- parts
- sealed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、半導体装置に係り、特に樹脂封止された半導
体装置の放熱特性の改善に関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to semiconductor devices, and more particularly to improving the heat dissipation characteristics of resin-sealed semiconductor devices.
従来例の構成とその問題点
集積回路素子の集積度の向上にともない、素子の発熱密
度は著しく増加してきている。素子の温度上昇は、その
電気的特性に影響をおよぼし、信頼性を極めて低下させ
てしまう。この問題を解消するために、素子自体の構造
を低消費電力のCMOSにする一方、その容器であるパ
ッケージにセラミック材料を用いたり、高熱伝導性の樹
脂ならびにリードフレームを用いて放熱性を向上させて
対応している。しかし、パンケージ材料のセラミックま
放熱特性、耐湿性など信頼性の面では樹脂よりもはるか
に優秀であるが、コスト高になることが諦けられず、こ
の面からみて、安価な樹脂封止型パッケージに移行して
きている。Conventional Structures and Problems With the increase in the degree of integration of integrated circuit elements, the heat generation density of the elements has increased significantly. An increase in the temperature of the element affects its electrical characteristics, significantly reducing reliability. In order to solve this problem, the structure of the device itself is a CMOS with low power consumption, and the heat dissipation is improved by using ceramic material for the package, and using highly thermally conductive resin and lead frames. We are responding accordingly. However, although ceramic is far superior to resin in terms of reliability such as heat dissipation properties and moisture resistance, the high cost is unavoidable, and from this point of view, inexpensive resin-sealed packages has been transitioning to
第1図aおよびbは、従来例のDIL型パッケージ半導
体装置の要部破断斜視図、およびA−A’所面図であり
、1は樹脂、2は外部リード、3は半導体チップ(ダイ
)、4はワイヤー、6は内部リード、6は載置部である
。ところが、このパッケージに開用される樹脂1の熱伝
導度は現状では、高いもD−11’も、4.OX 10
−5.0X10 ’Ca l 7m・渡・℃ が限界
で、たとえば、この種の高熱伝導性といわれる樹脂を用
いて、かつ、鉄−Ni系のリードフレームを使った22
pinDIPの半導体装置の場合、放熱性の尺度である
熱抵抗はせいぜい80〜b
のセラミックDIPO熱抵抗の約1.5 倍に相自する
。一般に樹脂封止型パッケージの放熱特性をセラミック
パッケージと同程度にするには、上述の高熱伝導性樹脂
を用い、銅系のリードフレームを使用することにより達
成できるが、銅系のリードフレームへの素子のダイスト
ボンドは、素子の裏面に多層金属膜を形成し、5n−p
bはんだによって行なうか、Aq 粉末を溶かし込んだ
エポキシペーストで行なうかのいずれかである。5n−
pb はんだによるダイスボンドは、素子の裏面処理の
工程を複雑かつ増加させ、コストアップをひき起こす。FIGS. 1a and 1b are a cutaway perspective view of essential parts of a conventional DIL-type packaged semiconductor device, and a top view taken along line A-A', in which 1 is a resin, 2 is an external lead, and 3 is a semiconductor chip (die). , 4 is a wire, 6 is an internal lead, and 6 is a mounting section. However, at present, the thermal conductivity of resin 1 used in this package is as high as 4. OX10
-5.0X10'Cal 7m/wad/℃ is the limit.For example, if this type of resin is used and an iron-Ni lead frame is used,
In the case of a pinDIP semiconductor device, the thermal resistance, which is a measure of heat dissipation, is at most about 1.5 times the thermal resistance of a ceramic DIPO of 80-b. Generally, making the heat dissipation characteristics of a resin-sealed package comparable to that of a ceramic package can be achieved by using the above-mentioned high thermal conductivity resin and using a copper-based lead frame. Die bonding of the device is performed by forming a multilayer metal film on the back side of the device, and forming a 5n-p
This can be done either with b-solder or with epoxy paste in which Aq powder is dissolved. 5n-
Dice bonding using pb solder complicates and increases the process of processing the back surface of the element, causing an increase in cost.
捷た、エポキシペーストによるダイスボンドは、ペース
トの熱伝導度が封止樹脂のそれと同程度で、素子からの
発熱は、ペーストを介してリードフレームに伝わるため
、銅系リードフレームの放熱特性の良さは生かされない
。このように、従来の樹脂封止型パッケージでは、放熱
特性を向上させるには、必ずコストアップを余儀無くさ
れるという問題点があった。Dice bonding using epoxy paste has the same thermal conductivity as that of the sealing resin, and the heat generated from the element is transmitted to the lead frame through the paste, so the copper lead frame has good heat dissipation characteristics. is not kept alive. As described above, conventional resin-sealed packages have had the problem that in order to improve heat dissipation characteristics, an increase in cost is inevitable.
発明の目的
本発明は、上述のような従来例に見られた問題点を解消
し、放熱特性のよい樹脂封止形半導体装置を提供するも
のである。OBJECTS OF THE INVENTION The present invention provides a resin-sealed semiconductor device with good heat dissipation characteristics by solving the problems seen in the conventional example as described above.
発明の構成
本発明は、要約するに、樹脂封止型半導体パッケージの
樹脂部分の厚みを半導体素子載置部および内部リード先
端部を覆う部分を厚く、他部は、通常の同形パッケージ
よりも薄くして、パッケージの放熱特性を著しく向上さ
せたものである。Composition of the Invention To summarize, the present invention has a resin-sealed semiconductor package in which the thickness of the resin part is made thicker in the part that covers the semiconductor element mounting part and the tip of the internal lead, and the other part is made thinner than in a normal same-shaped package. This significantly improves the heat dissipation characteristics of the package.
実施例の説明 本発明の実施例を図面を用いて説明する。Description of examples Embodiments of the present invention will be described using the drawings.
第2図aは、本発明の樹脂封止DIPパッケージの要部
破断外観斜視図、第2図すはそのB −B’断面図であ
る。FIG. 2a is a perspective view of the main part of the resin-sealed DIP package according to the present invention, and FIG. 2 is a cross-sectional view taken along the line B-B'.
一般に、熱的に定常状態のもとでは、熱抵抗は物体の厚
みに比例し、断面積と熱伝導度に反比例する関係がある
。従って、素子の発熱が内部リード全域に伝わった後で
は、パッケージの垂直方向の厚みが薄い程、放熱は、効
果的である。そこで、本発明では、第1図すと第2図す
を比較してわかるように、素子搭載部6ならびに内部リ
ード6端を覆う樹脂1は、ワイヤー74が露出しない程
度まで薄くし、他の部分の樹脂の厚みは、機械的強度を
そこなわず、耐湿性にも影響しない程度にまで薄くしだ
。実施例ではDIL型パッケージを用いたが、フラット
パッケージ、S○パッケージ、SIL型パッケージ、ア
キシャルリード型パッケージなど、樹脂封止型のパッケ
ージのいずれにも応用できる。Generally, under thermally steady conditions, thermal resistance is proportional to the thickness of an object and inversely proportional to its cross-sectional area and thermal conductivity. Therefore, after the heat generated by the element is transmitted throughout the internal leads, the thinner the vertical thickness of the package is, the more effective the heat dissipation becomes. Therefore, in the present invention, as can be seen by comparing FIG. 1 and FIG. The thickness of the resin in these parts has been reduced to a level that does not impair mechanical strength or affect moisture resistance. Although a DIL type package was used in the embodiment, it can be applied to any resin-sealed type package such as a flat package, S○ package, SIL type package, or axial lead type package.
発明の効果
本発明によれば、半導体素子載置部および内部リード先
端部を覆う樹脂部にくらべて、他部の樹脂部厚みを薄く
することにより、工程の変更をすることなく、放熱特性
の極めて高い半導体パッケージを得ることができる。ま
た、樹脂使用量が従来に比べ、格段に減少するため、コ
ストダウンが実現できる。加えて、素子載置部ならびに
内部リード先端を覆った樹脂による凸部の周辺の薄い樹
脂部表面にマーキングをすれば、接触頻度が少なくなる
のでマーキングが消えにくい。Effects of the Invention According to the present invention, the heat dissipation characteristics can be improved without changing the process by making the thickness of the resin part of other parts thinner than that of the resin part covering the semiconductor element mounting part and the tip of the internal lead. An extremely high quality semiconductor package can be obtained. Furthermore, since the amount of resin used is significantly reduced compared to conventional methods, cost reductions can be realized. In addition, if markings are made on the surface of the thin resin portion around the convex portion of the resin covering the element mounting portion and the tips of the internal leads, the markings will be less likely to be erased since the frequency of contact will be reduced.
第1図aは従来例の斜視図、第1図すは、第1図aのA
−A’部の断面図、第2図aは、本発明実施例の斜視図
、第2図すは、第2図aのB −B’部の断面図である
。
1・・・・・・樹脂、2・・・・・・外部リード、3・
・・・・・半導体素子、4・・・・・・ワイヤー、5・
・・・・・内部リード、6・・・・・・素子載置部。Figure 1a is a perspective view of the conventional example;
FIG. 2a is a perspective view of the embodiment of the present invention, and FIG. 2A is a sectional view of the section B-B' in FIG. 2a. 1...Resin, 2...External lead, 3.
...Semiconductor element, 4...Wire, 5.
...Internal lead, 6...Element placement part.
Claims (1)
厚みに比べて、他の部分を覆う樹脂部厚みを薄くしたこ
とを特徴とする樹脂封止形半導体装置。A resin-sealed semiconductor device characterized in that a resin part covering other parts is thinner than a resin part covering a semiconductor element mounting part and an internal lead tip.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16966083A JPS6060740A (en) | 1983-09-14 | 1983-09-14 | Resin-sealed semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16966083A JPS6060740A (en) | 1983-09-14 | 1983-09-14 | Resin-sealed semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6060740A true JPS6060740A (en) | 1985-04-08 |
Family
ID=15890568
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16966083A Pending JPS6060740A (en) | 1983-09-14 | 1983-09-14 | Resin-sealed semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6060740A (en) |
-
1983
- 1983-09-14 JP JP16966083A patent/JPS6060740A/en active Pending
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