JPS6055760A - Auxiliary signal transmission system - Google Patents

Abstract

PURPOSE:To simplify a circuit and reduce a scale by performing violation with a designating pulse in a transmission side in an auxiliary signal transmission system using CMI code. CONSTITUTION:A main signal 1 inputted to a transmitting part J is changed to a CMI code string, and meanwhile, an auxiliary signal 2 is sampled, and a violation designating pulse 12 is generated by a sampling output 11, and a transmission line signal 13 is transmitted after performing violation for the CMI code string of the main signal. In a receiving part K, the transmission line signal 13 is sent to not only a violation detecting circuit P but also to a CMI decoding circuit O, and it is restored to the original main signal 6. The detecting circuit P detects the violation of the code string 13, and its output 14 is restored to an original auxiliary signal 7 by an auxiliary signal decoding circuit Q.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention uses a CM I code as a transmission code/Auxiliary signals in which auxiliary signals such as line switching control signals, monitoring signals, switching or meeting signals are superimposed on the main signal and transmitted. 3゜〈Prior Art〉 The C ]Vf I code used as a transmission code, which is related to the superimposition method, will be described in general with reference to FIG.

Normally, binary codes are converted to CMI codes according to the following rules. That is, when the normal binary code (Figure 1b) is "0", the CMI code (Figure 1C) is 01'', and the normal binary code (Figure 1C) is 01'';
1b) or "1#", the CMI code (Fig. 1C) is set to "00" and 94 inches of the main number 11". 1st
Figure a shows a normal binary code (b). C
In M, I code (C), violation (CM
The method for causing this (violation of the I sign rule) is carried out according to the following rules.

In other words, when the normal binary sign -'FA7(b) of the time slot in which the violation occurs is "o", the CM
``01'' in I number (c) is set to ``10'', and when the code (b) is normally a binary code, alternation of 00'' and 11 is prohibited for that time, and CMI with violation is prohibited.
(Fig. 1d). * in Figure 1 indicates the violation position.

Conventionally, when transmitting an auxiliary signal by superimposing it using a violation, a frame for the violation is constructed and the % hino time slot is used for superimposing the auxiliary signal, and the receiving side synchronizes the frame and transmits the auxiliary signal. The most common method was separation.

This method is shown in FIG. 2, and its operation will be briefly described.

The main signal 1 input to the transmitter A is sent to the CIVi I signal train by the CMI conversion circuit C. On the other hand, the auxiliary signal 2 input to the sending section A and the frame pattern signal 3 generated by the frame pattern generation circuit E are sampled on the paternal side by the summing circuit, and the violation designation pulse 4 is generated by VI6, NO. Iolation designation pulse 4
is C1vI I Input sale and violation specification to variable circuit C; Cm of main signal only for time slot of Lux 4
Ioration is performed on the I code string. In this way, in response to the frame <turn signal 3 and the auxiliary signal 2, the transmission line signal 5 (CMI
) is sent to receiving section B.

On the other hand, in the receiving section B, the violation delivery circuit G
In the following, a frame synchronization circuit H and an auxiliary signal separation circuit detect a time slot with a rayon in the CMI code string of the transmission line signal 5, and generate a violation position pulse 8 that becomes "1'" at that time slot position. [Frame same] Circuit H detects the frame pattern signal in the center of the frame pattern signal of 8 and establishes synchronization, and at the time slot position where the auxiliary signal is superimposed, The auxiliary signal superimposition position Z pulse 9 is generated and sent to the auxiliary signal separation (b) path ■.The auxiliary signal separation circuit Violation position pulse 8
Detects the sign of , separates the auxiliary signal, and outputs the auxiliary No. 18 output signal. FIG. 3 shows a time chart of each part in FIG. 2. 10 in FIG. 3 is a clock pulse. In the figure, (*1) to (*5) represent the following meanings.

(*l) Sign of auxiliary signal human power 2 5n (n==1.2+3
・-・) is 0" when it is 0#, and when Sn is 1 u"
1″.

(*2) Frame pattern signal 30 code Fn (n=1.
2, 3. ...) is °0", °0#, Fn is I
When f 1 #, ''' 1 '0 (*3) When the code strength of the violation designation pulse 4 is "0", there is no violation; when it is "1", there is a violation.

(*4) The code of transmission line signal 5 (CIVII code) is "0#" when there is no violation, and "1" when there is violation.

(*5) When the pie ray/yon position No. ζ Lus 8 -4, is "0'", the auxiliary signal ratio cuff A']-S11° is "0"', when it is 11"Sn'il:"1".

It is.

As explained above, in the conventional method (c) a violation frame is assembled on the transmitting side, frame synchronization is performed on the receiving side, and R11 is performed for the auxiliary signal.
The frame synchronization circuit H that performs frame synchronization includes a circuit that generates a frame pattern, a circuit that detects a frame pattern in a received violation code string, a pull-in circuit that establishes synchronization, and a circuit that generates a frame pattern. Since a synchronization protection circuit is required to protect synchronization against code errors, the circuit becomes complex and considerably large in scale.

<Object of the invention> This invention is a novel invention that improves the above-mentioned drawbacks, and its purpose is to use CIVi I fr1 as a transmission line code.
An object of the present invention is to provide an auxiliary signal transmission system that uses a simple circuit and a small scale circuit in an auxiliary signal transmission system using a signal.

<Atsu of the invention> This invention uses a CIVL I code as a transmission path code,
civtIy3, which performs CMI coding rule violation on the auxiliary signal and superimposes the auxiliary signal on the main signal and transmits it, converts the main signal to CM I on the transmitting side.
q circuit, a sampling circuit that samples the auxiliary signal, and when the output signal of this sampling circuit is "0", a CM I code is generated based on the odor of this time slot and the time slot after n bits (n is an integer of 1 or more). When the output signal of the sampling circuit is 61'', this time slot and
iJ: In the time slot after one or more bits other than n, it is equipped with a violation specification circuit that specifies a violation of the C1VI code rule, and transmits the original main signal from the CMI matrix to the receiving side. Get CMI
A decoding circuit, a CM with an (n-1) bit interval, a sign rule violation signal, and a CM I with an (m-1) bit interval.
A violation detection circuit that detects code rule violations and an auxiliary signal decoding circuit that converts the original auxiliary signal from the output of the violation detection circuit are fiifi.
It is based on the 1111 assistant number transmission system, which uses what was received as the Buddha.

<Example> Examples will be described in detail below.

In FIG. 4, a device 6 that implements the method of the present invention consists of a transmitting section J and a receiving section, and the transmitting section J and the receiving section each have the following configurations. .

That is, the transmitter J sends the main signal 1 (usually a binary code) to C1
CMI encoding circuit to convert to vL I code +++
+ Sampling circuit M that samples the auxiliary signal 2,
When the output signal 11 of the sampling circuit M is "0",
A violation is specified in this time slot and the time slot after n bits (n is an integer other than 1), and when the output signal 11 of the sampling circuit M is "1", this time slot and m (m is an integer other than n) are specified. (an integer greater than or equal to 1) generation of a violation designation pulse that specifies a violation in the time slot of bit c; 1. C
41E6N. The receiving section includes a CMI decoding circuit that obtains the main signal 6 (usually a binary code) from the transmission line signal 13 (CMI code) sent along the transmission line, and a CMI decoding circuit (n-1 of the CIVII code string). ) A violation detection circuit P that detects a violation at a bit interval and a pie/con at an (m-1) bit interval and sends its output 14 to an auxiliary signal decoding circuit Q, and an auxiliary signal decoding circuit Q that decodes the auxiliary signal. It is composed of.

Next, the operation of the embodiment of the present invention will be explained with reference to FIGS. 4 and 5.

The main signal 1 inputted to the sending section J is converted from CMIq: to -3 column by the CMIi conversion circuit. On the other hand, send:
The auxiliary signal 2 input to fll J is sampled by the sampling circuit M, and the sampling output 11 (!:
When the sampling output 11 is 'o'', the high ray/hun designation circuit N specifies the high ray 7yon in the time slot 7) and 1] (n is an integer greater than or equal to 1) bits later. is executed, and if the sampling output 11 is still "1'", a violation is specified in this time slot and a time slot m (rn is an integer other than n, which is an integer of 1 or more) bits later. Create. The PIO-RE/CON specified pulse 12 is input to the cMIi switching circuit, and only in the time slot of the PIO-RE/CON specified pulse, a violation is caused to the CM series of the main signal 4. In this way, the Fukusuke signal 2 is Accordingly, the transmission line signal 13 (CIVI I code) that caused the violation is sent to the receiving section K.

On the other hand, the transmission path No. 13 sent at the receiving section K
(CMI code) is sent to the violation detection circuit P and simultaneously sent to the CIVf I provisional request circuit 0, and is returned to the original main signal 6. In the pie ray/con detection circuit itaP, detection of violations at (n-1) bit intervals of 1fjl in the CMI code string 13 and detection of pie ray/con at (m-1) bit intervals are carried out, and the output thereof is performed. 14 is the auxiliary information - bow 11:! The circuit Q returns the original auxiliary signal 7. FIG. 5 shows a time chart of each part when n is 1 and m is 2 in FIG. 15 in FIG. 5 is a clock pulse.

In the figure, (*6) to (*9) represent the following meanings.

(*6) Sign 3 of auxiliary signal human power 2 When n is °o'' °
0'', 111' when Sn is 61''.

(*7) When the sign of sampling output 11 is “OII”, it is “110”, and when it is “1”, it is “101”.

(J8) Violation designation pulse 12 is @110
'', violation presence/absence, "101", violation presence/absence I1゜ (*9) When violation presence appears continuously in the code of transmission path signal 13 (CMI code) - l”, and “o” when a violation appears every other bit.

The pie ole/con detection circuit P is a conventional pie ole/y/
The detection circuit G can be constructed with a simple -rIn logic circuit, and the bit shift register (n) can be constructed with a simple -rIn logic circuit (when n = n, m) when k = m), and the temporary signal circuit Q Ij+' is also set by a set flip-flop circuit, etc.
+ can simply be configured, i.e. the detected violation is 1
One bit shift register allows n time slots,
Match the delayed one and the one without the valley delay, respectively, set the flip-flop with the matching output of the negative force, and reset the flip-flop with the other matched output (if possible, for this reason, the second The circuit is much easier to understand than the ``Yakumei'' method of separating the auxiliary signals by taking the same frame as shown in the figure.

Effects> As explained above, by adopting the circuit configuration according to the present invention, it is possible to transmit auxiliary signals using violations of the CMI coding rule using a simple and relatively small circuit. Become.

[Brief explanation of the drawing]

Fig. 1 is a diagram showing an example of a CMI code conversion method im chart, Fig. 2 is a configuration diagram showing an example of a conventional auxiliary signal transmission system, and Fig. 3 is a diagram showing the valleys in the configuration example of the conventional auxiliary signal transmission system. 4 is a block diagram showing an embodiment of the auxiliary signal transmission method of the present invention, and FIG. 5 is a time chart of the troughs in the configuration of the auxiliary signal transmission method of the present invention. , 1. J: transmitter, K: receiver, L: CMI variable circuit, to 4:
Zangling times %, N: Violation designation pulse generation circuit, 0: CMI Shungo circuit, P: Violation detection circuit, Q: Auxiliary signal decoding 1 open circuit, 1: Main signal (usually binary code) input, 2: fin Auxiliary signal input, 6: Main signal (usually binary code) output, 7 Two auxiliary signal outputs, 11: Sampled auxiliary signal, 12: Violation designation pulse, 13: Transmission line im code (CMI code), 14:
Violation detection collar 15: Kurotsuta pulse. Patent applicant Taku Kusano, agent for NEC Corporation

Claims (1)

[Claims] (1) Using the CM I code as the transmission line code, performing a violation of the CM I code rule in response to the auxiliary signal,
In the method of superimposing an auxiliary signal on the main signal and transmitting it, the transmitting side has a CMI conversion that converts the main signal into CMI, a sampling circuit that samples the auxiliary signal, and a sampling circuit that converts the main signal into CMI, and the output signal of this sampling circuit is "0". In this case, a violation of the CMI coding rule is specified in this time slot and a time slot after n bits (n is an integer of 1 or more), and when the output signal of the sampling circuit is 1'', this time slot and m (m is an integer of 1 or more other than n) A violation designation circuit that designates a violation of the CMI code rule in the time slot after the bit is added to the receiving side to obtain the original main signal from the received CMI code string. CMI decoding circuit, (n-1) bit interval CMI coding rule biore=/'Yonai code and (
m-1) Equipped with a violation detection circuit that detects a bit-interval CM I violation signal, and a circuit that obtains the original auxiliary signal from the output of the violation detection circuit. Auxiliary No. 46 transmission system that is similar to %.