JPS6055719A - フリツプフロツプ回路 - Google Patents

フリツプフロツプ回路

Info

Publication number
JPS6055719A
JPS6055719A JP58163149A JP16314983A JPS6055719A JP S6055719 A JPS6055719 A JP S6055719A JP 58163149 A JP58163149 A JP 58163149A JP 16314983 A JP16314983 A JP 16314983A JP S6055719 A JPS6055719 A JP S6055719A
Authority
JP
Japan
Prior art keywords
circuit
output
trs
input
circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58163149A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0339410B2 (cg-RX-API-DMAC7.html
Inventor
Shuichi Ishii
修一 石井
Mitsuo Usami
光雄 宇佐美
Katsuji Horiguchi
勝治 堀口
Michihiro Hirata
平田　道広
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
NTT Inc
Original Assignee
Hitachi Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Nippon Telegraph and Telephone Corp filed Critical Hitachi Ltd
Priority to JP58163149A priority Critical patent/JPS6055719A/ja
Publication of JPS6055719A publication Critical patent/JPS6055719A/ja
Publication of JPH0339410B2 publication Critical patent/JPH0339410B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
JP58163149A 1983-09-07 1983-09-07 フリツプフロツプ回路 Granted JPS6055719A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58163149A JPS6055719A (ja) 1983-09-07 1983-09-07 フリツプフロツプ回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58163149A JPS6055719A (ja) 1983-09-07 1983-09-07 フリツプフロツプ回路

Publications (2)

Publication Number Publication Date
JPS6055719A true JPS6055719A (ja) 1985-04-01
JPH0339410B2 JPH0339410B2 (cg-RX-API-DMAC7.html) 1991-06-13

Family

ID=15768148

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58163149A Granted JPS6055719A (ja) 1983-09-07 1983-09-07 フリツプフロツプ回路

Country Status (1)

Country Link
JP (1) JPS6055719A (cg-RX-API-DMAC7.html)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5392655A (en) * 1977-01-26 1978-08-14 Toshiba Corp Logic circuit
JPS5542411U (cg-RX-API-DMAC7.html) * 1978-09-08 1980-03-19

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5392655A (en) * 1977-01-26 1978-08-14 Toshiba Corp Logic circuit
JPS5542411U (cg-RX-API-DMAC7.html) * 1978-09-08 1980-03-19

Also Published As

Publication number Publication date
JPH0339410B2 (cg-RX-API-DMAC7.html) 1991-06-13

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