JPS6051376A - Solid-state image pickup device - Google Patents
Solid-state image pickup deviceInfo
- Publication number
- JPS6051376A JPS6051376A JP58157729A JP15772983A JPS6051376A JP S6051376 A JPS6051376 A JP S6051376A JP 58157729 A JP58157729 A JP 58157729A JP 15772983 A JP15772983 A JP 15772983A JP S6051376 A JPS6051376 A JP S6051376A
- Authority
- JP
- Japan
- Prior art keywords
- light
- gap
- film
- electrode
- electrodes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims abstract description 18
- 239000004020 conductor Substances 0.000 claims abstract description 11
- 239000004065 semiconductor Substances 0.000 claims abstract description 11
- 238000003384 imaging method Methods 0.000 claims description 15
- 238000005530 etching Methods 0.000 abstract description 12
- 239000012535 impurity Substances 0.000 abstract description 9
- 239000000463 material Substances 0.000 abstract description 4
- 238000009825 accumulation Methods 0.000 abstract description 2
- 238000009499 grossing Methods 0.000 description 6
- 229910052782 aluminium Inorganic materials 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- 229910052750 molybdenum Inorganic materials 0.000 description 3
- 239000007787 solid Substances 0.000 description 3
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 2
- 206010034972 Photosensitivity reaction Diseases 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 239000011733 molybdenum Substances 0.000 description 2
- 230000036211 photosensitivity Effects 0.000 description 2
- DDFHBQSCUXNBSA-UHFFFAOYSA-N 5-(5-carboxythiophen-2-yl)thiophene-2-carboxylic acid Chemical compound S1C(C(=O)O)=CC=C1C1=CC=C(C(O)=O)S1 DDFHBQSCUXNBSA-UHFFFAOYSA-N 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14665—Imagers using a photoconductor layer
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の属する技術分野〕
本発明は複数個の電気的に独立した電極を形成した固体
基板上に光導電膜が形成され、さらにその上に電極が形
成された固体撮像装置に関し、特にプルーミング特性を
高めた固体撮像装置に関する。[Detailed description of the invention] [Technical field to which the invention pertains] The present invention relates to a solid substrate in which a photoconductive film is formed on a solid substrate on which a plurality of electrically independent electrodes are formed, and further electrodes are formed on the solid substrate. The present invention relates to an imaging device, and particularly to a solid-state imaging device with improved pluming characteristics.
光感度を増加させるために、フォトダイオードの代わり
に光導電膜を用いXY定走査ための電界効果トランジス
タ回路と組み合せた固体撮像装置(特開昭49−911
16号公報)や、光導電膜と自己走査機能を有する回路
どな組み合せた固体撮像装置(特開昭51−96720
号公報)が知られている。この様な固体撮像装置は一般
に走査回路基板の凹凸が約1〜2μm程度あるため、直
接光導電膜を積層させると、光導電膜の内部クランクや
電気的リークを起し易すく画像欠陥を引き起すので、走
査回路を、、平滑化した後光導電膜を積層する方向へ発
展している。このためこの様な固体撮像装置は、光導電
体で光電変換された電荷を集める電極は2層構造になっ
ているのが特徴である。In order to increase photosensitivity, a solid-state imaging device (Japanese Unexamined Patent Publication No. 49-911
No. 16), solid-state imaging devices that combine a photoconductive film and a circuit with a self-scanning function (Japanese Patent Laid-Open No. 51-96720)
Publication No.) is known. Such solid-state imaging devices generally have unevenness on the scanning circuit board of about 1 to 2 μm, so if the photoconductive film is directly laminated, internal cranking or electrical leakage of the photoconductive film is likely to occur, resulting in image defects. Therefore, progress has been made in the direction of forming a scanning circuit by layering a photoconductive film after smoothing. For this reason, such solid-state imaging devices are characterized in that the electrodes that collect the charges photoelectrically converted by the photoconductor have a two-layer structure.
さて、一般に固体撮像装置は撮像管ターゲットと異なり
、絵素領域が分離されているために、光導電膜に暇収さ
れない長波長の入射光が絵素に対応する電極の間隙より
走査基板に到達し、プルーミング発生の原因となること
が知られている。このブルーミング抑制のため、光導電
膜上の絵素間然しながらこの様な構造においては、光導
電膜に入射する光利用効率が低下するため光感度が低下
することと、また入射光が斜めに入ってくる場合光透へ
い効果がほとんどなくなる等の欠点を有する。Generally speaking, solid-state imaging devices differ from image pickup tube targets in that the pixel regions are separated, so long-wavelength incident light that is not absorbed by the photoconductive film reaches the scanning substrate through the gap between the electrodes corresponding to the pixel. However, it is known to cause pluming. In order to suppress this blooming, the picture elements on the photoconductive film, however, in such a structure, the efficiency of using light incident on the photoconductive film decreases, resulting in a decrease in photosensitivity, and the incident light enters diagonally. When it comes to light, it has drawbacks such as almost no light transmission effect.
本発明は上記の様な欠点に鑑みなされたもので、平滑化
された走査基板上に光導電膜を積層した固体撮像装置に
おいて、光透へい部を2層電極近傍(=配置した構造に
関し、光利用効率の低下防止及びブルーミング特性の向
上を目的とするものである。The present invention was made in view of the above-mentioned drawbacks, and relates to a structure in which a light-transmitting part is placed near the two-layer electrode in a solid-state imaging device in which a photoconductive film is laminated on a smoothed scanning substrate. The purpose is to prevent a decrease in light utilization efficiency and improve blooming characteristics.
本発明は、導体電極の間隙部分の下地材料を、導体電極
の間隙よりも広く蝕刻し、その蝕刻された部分に光透へ
い層を設けたものである。これにより絵素に対応した電
極の分離領域より半導体基板へ向う入射光が遮へいされ
ブルーミング特性が向上する。In the present invention, the base material in the gap between the conductor electrodes is etched to be wider than the gap between the conductor electrodes, and a light-transmitting layer is provided in the etched area. This blocks the incident light directed toward the semiconductor substrate from the isolation region of the electrode corresponding to the picture element, improving the blooming characteristic.
第1図に本発明の一実施例に係る固体撮像装置の断面図
、$2図はその要部断面図を示す。FIG. 1 is a sectional view of a solid-state imaging device according to an embodiment of the present invention, and FIG. 2 is a sectional view of a main part thereof.
本発明の固体撮像装置は、第1図に示すように構成され
、例えばp型の半導体基板(2)に第1のn+型不純物
領域(4) 、 (6)がマトリクス状に設けられ、こ
の第1のn+型不純物領域に隣接してゲート領域(8)
、σCを介して第2のn+型不純物領域Q、2 、 H
が夫夫設けられている。また第1.第2のn+型不純物
領域(4) 、 (121,、を111位としてこれら
単位間を分離するp+型のストッパー領域(16) 、
H、(20)が設けられている。更にゲート領域、第
2のn+型不純物領域及びストッパー領域が位置する基
板(2)上には、ゲート絶縁膜(22、(2勢、 (2
+;)を介して転送電極である多結晶シリコンのゲート
電極(イ)、 po)、 (32が設けられている。ゲ
ート電極を含む基板上には、第1のn+型不純物領域(
4) 、 (6)の一部を除いて絶縁膜04)が設けら
れ、この絶縁膜上(=は、コンタクト・ホール(7)。The solid-state imaging device of the present invention is configured as shown in FIG. Gate region (8) adjacent to the first n+ type impurity region
, σC to the second n+ type impurity region Q,2,H
There are husbands and wives. Also number 1. a second n+ type impurity region (4), a p+ type stopper region (16) separating these units with (121,,) at position 111,
H, (20) is provided. Furthermore, on the substrate (2) where the gate region, the second n+ type impurity region, and the stopper region are located, a gate insulating film (22,
Polycrystalline silicon gate electrodes (a), po), (32), which are transfer electrodes, are provided through the gate electrodes (32).
4), an insulating film 04) is provided except for a part of (6), and on this insulating film (= is a contact hole (7)).
(2)を介して第1の11型不純物領域(4) 、 (
6)と接続され、各々独立した複数の第1の電極(41
、(43が設けられている。第1の電極の所定のパター
ン形状に対応して、絶縁膜(34)は第2図に示すよう
に、第1の電極(4G 、 (42の間隙よりも幅広に
蝕刻される。絶縁膜04)が例えばsio、膜の場合に
は、フッ化アンモニウムによってエツチングされる。こ
の時サイドエツチングにより第1の電極(4G 、 G
Qの間隙よりも広くエツチングされる。エツチングの程
度は、転送電極[30)に影響を与えないように形成す
ることが望ましい。次にこのエツチングにより形成され
り溝(44)の底部に、光透へい膜06)を形成する。(2) through the first 11 type impurity region (4), (
6), and a plurality of independent first electrodes (41
. If the insulating film 04) is a SIO film, it is etched with ammonium fluoride.At this time, the first electrodes (4G, G) are etched by side etching.
It is etched wider than the gap Q. The degree of etching is preferably such that it does not affect the transfer electrode [30]. Next, a light-transmitting film 06) is formed at the bottom of the groove (44) formed by this etching.
光学的黒である光透へい膜としては、入射光特に長波長
光が半導体基板(2)に到達しない物質であればよく、
例えばAl、Cr、Ti 、Mo、W等の金属物質で形
成される。光透へい膜は、例えば蒸着により形成され、
第1の電極f40 、 (421及び溝(44)の全面
C二形成される。The optically black light-transmitting film may be any material that prevents incident light, particularly long wavelength light, from reaching the semiconductor substrate (2).
For example, it is formed of a metal material such as Al, Cr, Ti, Mo, or W. The light-transmitting film is formed, for example, by vapor deposition,
A first electrode f40 (421) and a groove (44) are formed on the entire surface C2.
溝(44)の形状を第2図に示すように第1の電極顛。The shape of the groove (44) is as shown in FIG. 2 in the first electrode frame.
(4邊の間隙よりも幅広とすることにより、溝(44)
に被着される光透へい膜と第1の電極f40 、 (4
3上に被着される光透へい膜とは′電気的に接続するこ
とが防止される。(By making the gap wider than the gap at the 4 sides, the groove (44)
The light-transmitting film and the first electrode f40, (4
Electrical connection with the light-transmitting film deposited on 3 is prevented.
次に平滑化層(4枠として絶縁材料で上述のとおり形成
された半導体基板を覆い、表面を平滑化する。Next, the semiconductor substrate formed as described above is covered with an insulating material as a smoothing layer (4 frames) to smooth the surface.
この際、溝は絶縁材料によって埋まり平滑化される。こ
の後平滑化層(4eJに冬用1の電極(4り、(4壕に
対応してコンタクトホール5G、(52)を形成し、平
滑化層(4棒上に導電膜を第1の電極(43、(4■と
接続するよう被着する。この導電膜は導電物質である光
透へい膜を介して第1の電極と電気的に接続される。At this time, the groove is filled with an insulating material and smoothed. After this, a contact hole 5G (corresponding to the 4 grooves) is formed on the smoothing layer (4eJ), contact holes 5G (52) are formed on the 4eJ, and a conductive film is placed on the smoothing layer (4 wires) as the first electrode. (43, (4) is deposited so as to be connected to the conductive film. This conductive film is electrically connected to the first electrode via a light-transmitting film which is a conductive material.
この導電膜は、第1の電極(4S5 、 (4艷に対応
して所定のパターン、に分離され、第2の電極(54)
、 (56)とされる。第2の電極(54) 、 (
56) 、 (57)上には、光導電体膜(58)及び
表面電極(60)が順次積層される。This conductive film is separated into a first electrode (4S5) (a predetermined pattern corresponding to the four electrodes), and a second electrode (54).
, (56). The second electrode (54), (
A photoconductor film (58) and a surface electrode (60) are sequentially laminated on 56) and (57).
光導電体膜(58)は例えばアモルファスシリコン、表
面電極(60)は例えばITOからなる。The photoconductor film (58) is made of, for example, amorphous silicon, and the surface electrode (60) is made of, for example, ITO.
上述の固体撮像装置は、表面電極(60)に所定の電圧
を印加させた状態で光導電体膜(58)に光が照射され
ると、光導電体膜で光電変換されて信号電荷が発生する
と共に、その信号電荷は第1の電極(4n 、 +42
を通って逆バイアスされたp型半導体基板(2)の第1
のn+型不純物領域(4) 、 (6)に主として蓄積
される。こうして蓄積された信号電荷は、任意の蓄積時
間後にゲート電極/38) 、 (30) 、 C’+
2に電圧を印加することにより、ゲート領域(8) 、
(10)を通って第2のn型不純物領域(12、(+
41に読み出される。In the solid-state imaging device described above, when light is irradiated onto the photoconductor film (58) with a predetermined voltage applied to the surface electrode (60), the photoconductor film performs photoelectric conversion and generates signal charges. At the same time, the signal charge is transferred to the first electrode (4n, +42
The first of the p-type semiconductor substrate (2) reverse biased through
It is mainly accumulated in the n+ type impurity regions (4) and (6). The signal charge accumulated in this way is transferred to the gate electrode /38), (30), C'+ after an arbitrary accumulation time.
By applying a voltage to the gate region (8),
(10) to the second n-type impurity region (12, (+
41.
さて上述のように構成された本発明の固体撮像装置によ
れば、入射光(62)に対して半導体基板(2)が露出
する部分はなく、基板への入射光はなくなりプルーミン
グ特性が向上する。また光遮へい膜を設けることビ光利
用効率は、低下することはない。Now, according to the solid-state imaging device of the present invention configured as described above, there is no part of the semiconductor substrate (2) that is exposed to the incident light (62), and there is no incident light to the substrate, and the pluming characteristics are improved. . Furthermore, the light utilization efficiency is not reduced by providing a light shielding film.
上述の実施例では、絶縁膜<34)をサイドエツチング
する例について説明したが、第1の電極となる導体膜を
多層膜構造とし、下層となる導体膜をエツチングして溝
を形成しても良い。即ちエツチングレートの異なる金属
を、エツチングレートの大きいものから順次積層して、
エツチングレートの低い下層の導体膜をサイドエツチン
グして、第1の電極の間隙よりも幅広の溝を形成するも
のである。第3図にこの実施例を示すように、絶縁層0
4)上にはモリブデン層(62)及びアルミニウム層(
64)を順次積層する。この後、プラズマエツチング等
によりサイドエツチングの効果を利用して、アルミニウ
ム層(64)所定のパターンに分離して第1の電極を形
成すると共に、モリブデン層(62)を第3図示のよう
にサイドエツチングする。この後、アルミニウム層(6
4)上及び絶縁膜(財)上に光遮へい膜(4G)を被着
する。次いで平滑化層(掲、光導電体膜(58)及び表
面電極(60)を形成する。In the above embodiment, an example was explained in which the insulating film <34) was side-etched, but it is also possible to form the groove by forming the conductive film that becomes the first electrode with a multilayer structure and etching the conductive film that becomes the lower layer. good. That is, metals with different etching rates are laminated in order from the one with the highest etching rate,
A groove wider than the gap between the first electrodes is formed by side etching the underlying conductor film, which has a low etching rate. As shown in this embodiment in FIG.
4) On top are a molybdenum layer (62) and an aluminum layer (
64) are sequentially stacked. Thereafter, by utilizing the side etching effect by plasma etching or the like, the aluminum layer (64) is separated into a predetermined pattern to form the first electrode, and the molybdenum layer (62) is side etched as shown in the third figure. Etching. After this, an aluminum layer (6
4) Deposit a light shielding film (4G) on top and on the insulating film (goods). Next, a smoothing layer (namely, a photoconductor film (58) and a surface electrode (60) are formed.
またこ9多層構造において、最上層が導電体であれば他
の層は絶縁体であっても良い。この場合、他の層の絶縁
体は、絶縁膜(3りよりもエツチングレートが大きい材
料であれば上述の実施例と同様の効果が期待できる。Furthermore, in this nine-layered structure, if the top layer is a conductor, the other layers may be insulators. In this case, if the insulator of the other layer is a material having a higher etching rate than the insulating film (3), the same effect as in the above embodiment can be expected.
更に本発明では、光遮へい膜を設けた構造は、平滑化層
(橋上に設けられる第2の電極側に設けてもよく、また
第1及び第2の電極の双方に適用しても良い。Furthermore, in the present invention, the structure in which the light shielding film is provided may be provided on the smoothing layer (on the second electrode side provided on the bridge), or may be applied to both the first and second electrodes.
上述の実施例では、半導体基板に形成される走査回路と
してCCDを用いたものを例示したが、本発明はこれら
限らずMOS型、CHD +BBT)の場合にも適用で
きる。In the above-described embodiments, a CCD is used as a scanning circuit formed on a semiconductor substrate, but the present invention is not limited to these, but can also be applied to a MOS type, CHD+BBT).
以上説明したように、本発明によれば第1の電極及び第
2の電極がマトリクス状に設けられていても、光遮へい
膜によって半導体基板は入射光から遮へいされるので、
プルーミング特性が従来に比べ改善される。As explained above, according to the present invention, even if the first electrode and the second electrode are provided in a matrix, the semiconductor substrate is shielded from incident light by the light shielding film.
Plumping characteristics are improved compared to conventional methods.
第1図は本発明の一実施例を示す断面図、第2図は第1
図に示す固体撮像装置の要部拡大図、第代理人 弁理士
則 近 憲 佑
(ほか1名)
第 1 図
第 2 図FIG. 1 is a sectional view showing one embodiment of the present invention, and FIG.
Enlarged view of the main parts of the solid-state imaging device shown in Figure 1, Patent Attorney Kensuke Chika (and one other person), Figure 1, Figure 2
Claims (1)
前記蓄積部と電気的に接続され、それぞれに対応してた
がいに分離されてなる導体電極、光導電体膜及び該光導
電体膜上に設けられた表面電極を有する固体撮像装置に
おいて、前記導体電極の間隙部分と前記半導体基板との
間に絶縁膜を有し、該絶縁膜は前記間隙部分で該間隙よ
りも幅広に蝕刻され、該蝕刻された部分に光遮へい層を
備えることを特徴とする固体撮像装置。A semiconductor substrate having a scanning circuit and a plurality of charge storage parts, a conductor electrode electrically connected to the storage part and separated from each other correspondingly, a photoconductor film, and a photoconductor film on the photoconductor film. In the solid-state imaging device having a surface electrode provided therein, an insulating film is provided between the gap portion of the conductor electrode and the semiconductor substrate, the insulating film is etched to be wider in the gap portion than the gap, and A solid-state imaging device comprising a light shielding layer in an etched portion.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58157729A JPS6051376A (en) | 1983-08-31 | 1983-08-31 | Solid-state image pickup device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58157729A JPS6051376A (en) | 1983-08-31 | 1983-08-31 | Solid-state image pickup device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6051376A true JPS6051376A (en) | 1985-03-22 |
Family
ID=15656084
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58157729A Pending JPS6051376A (en) | 1983-08-31 | 1983-08-31 | Solid-state image pickup device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6051376A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63164271A (en) * | 1986-12-26 | 1988-07-07 | Toshiba Corp | Solid-state image sensing device |
US5204762A (en) * | 1987-10-30 | 1993-04-20 | Canon Kabushiki Kaisha | Image reading device |
JP2009212377A (en) * | 2008-03-05 | 2009-09-17 | Fujifilm Corp | Maging device and production method of imaging device |
-
1983
- 1983-08-31 JP JP58157729A patent/JPS6051376A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63164271A (en) * | 1986-12-26 | 1988-07-07 | Toshiba Corp | Solid-state image sensing device |
US5204762A (en) * | 1987-10-30 | 1993-04-20 | Canon Kabushiki Kaisha | Image reading device |
JP2009212377A (en) * | 2008-03-05 | 2009-09-17 | Fujifilm Corp | Maging device and production method of imaging device |
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