JPS59119980A - Solid state image pickup device - Google Patents
Solid state image pickup deviceInfo
- Publication number
- JPS59119980A JPS59119980A JP57232814A JP23281482A JPS59119980A JP S59119980 A JPS59119980 A JP S59119980A JP 57232814 A JP57232814 A JP 57232814A JP 23281482 A JP23281482 A JP 23281482A JP S59119980 A JPS59119980 A JP S59119980A
- Authority
- JP
- Japan
- Prior art keywords
- film
- electrode
- layer
- contact hole
- storage diode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000007787 solid Substances 0.000 title 1
- 238000003860 storage Methods 0.000 claims abstract description 17
- 239000000758 substrate Substances 0.000 claims abstract description 14
- 238000006243 chemical reaction Methods 0.000 claims description 11
- 238000003384 imaging method Methods 0.000 claims description 9
- 239000004065 semiconductor Substances 0.000 claims description 2
- 229910052751 metal Inorganic materials 0.000 abstract description 8
- 239000002184 metal Substances 0.000 abstract description 8
- 230000007547 defect Effects 0.000 abstract description 6
- 239000007772 electrode material Substances 0.000 abstract description 2
- 239000004020 conductor Substances 0.000 abstract 1
- 238000000034 method Methods 0.000 description 10
- 230000035945 sensitivity Effects 0.000 description 7
- 238000004519 manufacturing process Methods 0.000 description 6
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 6
- 238000001444 catalytic combustion detection Methods 0.000 description 4
- 229910052759 nickel Inorganic materials 0.000 description 4
- 238000001020 plasma etching Methods 0.000 description 4
- 238000007747 plating Methods 0.000 description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 238000009713 electroplating Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000012528 membrane Substances 0.000 description 2
- 239000000523 sample Substances 0.000 description 2
- 238000003756 stirring Methods 0.000 description 2
- 229910004611 CdZnTe Inorganic materials 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 229910005091 Si3N Inorganic materials 0.000 description 1
- 206010047571 Visual impairment Diseases 0.000 description 1
- -1 Z. n Substances 0.000 description 1
- 229910052789 astatine Inorganic materials 0.000 description 1
- UHYPYGJEEGLRJD-UHFFFAOYSA-N cadmium(2+);selenium(2-) Chemical compound [Se-2].[Cd+2] UHYPYGJEEGLRJD-UHFFFAOYSA-N 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 239000002305 electric material Substances 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 229910052745 lead Inorganic materials 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- 235000012431 wafers Nutrition 0.000 description 1
- NWONKYPBYAMBJT-UHFFFAOYSA-L zinc sulfate Chemical compound [Zn+2].[O-]S([O-])(=O)=O NWONKYPBYAMBJT-UHFFFAOYSA-L 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14665—Imagers using a photoconductor layer
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
この発明は固体撮像装置に係り、特に電荷転送素子と光
電変換膜を組合せて構成される固体撮像装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a solid-state imaging device, and particularly to a solid-state imaging device configured by combining a charge transfer element and a photoelectric conversion film.
固体撮像素子は従来の撮像管と比べて小型、軽量、高信
頼性のカメラとなり、残像の殆ない良質の画像を得るこ
とができるという利点を有する。Solid-state image sensors have the advantage of being smaller, lighter, and more reliable cameras than conventional image pickup tubes, and of being able to obtain high-quality images with almost no afterimages.
しかしながら、固体撮像索子は主としてＳｉウェハ上に
形成され、使用可能な感度波長領域が可視近辺に限定さ
れる欠点、また光電変換を行うＰｎホトダイオードの有
効感光部と信号電荷転送を行う無効感光部があり十分な
感度が得られず、モアレ等の偽信号が出やすいといった
撮像管にはない欠点が存在する。このような欠点を除く
固体撮像素子として、従来の固体撮像素子をそのまま走
査部として使用し、その上に設けた光導電体膜にて光電
変換を行う構造のものが提案されている。第１図はこの
ような光導電体膜と電荷転送素子を組合せたインクライ
ン転送形固体撮像素子の一画素部分の断面図である。However, solid-state imaging probes are mainly formed on Si wafers, and have the drawback that the usable sensitivity wavelength range is limited to the visible region.Also, the solid-state imaging probe has the disadvantage that the usable sensitivity wavelength range is limited to the visible region, and the effective photosensitive area of the Pn photodiode that performs photoelectric conversion and the ineffective photosensitive area that transfers signal charges. They have drawbacks that image pickup tubes do not have, such as not being able to obtain sufficient sensitivity and being prone to producing false signals such as moiré. As a solid-state image sensor that eliminates these drawbacks, a structure has been proposed in which a conventional solid-state image sensor is used as it is as a scanning section, and a photoconductor film provided thereon performs photoelectric conversion. FIG. 1 is a cross-sectional view of one pixel portion of an incline transfer type solid-state image sensor that combines such a photoconductor film and a charge transfer element.
Ｐ型Ｓｉ基板１０を用い、ｎ＋層１１１とその上に絶縁
膜を介して配設したポリＳｉからなる転送ダート電極１
２０，１２２により埋込みチャネル型の垂直読出しＣＣ
Ｄを構成し、又、ｎ＋層１１２により信号電荷を蓄積す
る蓄積ダイオードを構成している。このようにＣＣＤと
蓄積ダイオードが形成された基板の蓄積ダイオード部分
には熱酸化膜を含む第一酸化膜１３にエツチングを行い
、１層１１２を露出させてＡｔなどの第一電極１４を所
定形状に形成する。この後更に第二酸化膜１５を積層し
てこれにエツチングを行い、第一電極１４の一部を露出
させてＡｔなどの第二電極１６を形成する。この上部に
アモルファス５ｔ（ａ−８ｌ）などの光導電体膜１７を
スノＲツタやグロー放電分解法により形成し、更に透明
導電膜１８を形成して、走査部と光電変換部を有する固
体撮像素子を得る。A transfer dart electrode 1 is formed using a P-type Si substrate 10 and is made of an n+ layer 111 and poly-Si disposed on the n+ layer 111 via an insulating film.
20, 122 for buried channel type vertical readout CC
In addition, the n+ layer 112 constitutes a storage diode for accumulating signal charges. In the storage diode portion of the substrate where the CCD and the storage diode are formed, the first oxide film 13 including a thermal oxide film is etched to expose the first layer 112, and the first electrode 14 made of At or the like is formed in a predetermined shape. to form. Thereafter, a second oxide film 15 is further laminated and etched to expose a portion of the first electrode 14 to form a second electrode 16 made of At or the like. A photoconductor film 17 such as amorphous 5t (a-8l) is formed on top of this by the Snow R Tsuta or glow discharge decomposition method, and a transparent conductive film 18 is further formed to form a solid-state image sensor having a scanning section and a photoelectric conversion section. Get the element.
なお、第一、第二の電極１４，１６をそれぞれポリＳｉ
＋モリブデンとして同様の構造としたものが特開昭５
７−３２１８３号公報に記載されている。Note that the first and second electrodes 14 and 16 are made of poly-Si, respectively.
+Molybdenum with a similar structure was published in Japanese Patent Application Publication No. 5
It is described in Publication No. 7-32183.
このような固体撮像素子に２いては、従来ならば蓄積ダ
イオードの部分のみが一画素として有効に働いたのに対
して、第二電極１６の部分が一画素として有効な光電変
換を行うので感度が増加する利点が生ずる。この場合、
本来第一電極１４上に光導電体膜１７を形成してもよい
のであるが、これでは基板表面の凹凸による段差が２〜
４μｍ程度あってエツチング部に急峻な段差が形成され
ているため、光導電体膜が段差で不連続になり、画像の
欠陥を生じたり、極端な場合は感度が得られず出画不良
となってし１つ。これを防ぐため、図示のよ′うに第二
酸化膜１５と第二電極１６を用いて段差を解消しつ＼、
なるべく平滑な面に光導電体膜１７を形成することが行
われている。しかしこの構成でｈっても、基板表面の段
差は完全には解消されず画像欠陥が出やすい。また製造
工程も複雑でるり、パターンのずれによる不良を生ずる
危険が太きい。In such a solid-state image sensor 2, whereas conventionally only the storage diode part worked effectively as one pixel, the second electrode 16 performs effective photoelectric conversion as one pixel, so the sensitivity is improved. This results in the advantage of increased in this case,
Originally, it would be possible to form the photoconductor film 17 on the first electrode 14, but in this case, the difference in level due to the unevenness of the substrate surface would be 2 to 2.
Because the etching area has a steep step of about 4 μm, the photoconductor film becomes discontinuous due to the step, resulting in image defects or, in extreme cases, poor sensitivity and poor image output. One piece. In order to prevent this, the second oxide film 15 and second electrode 16 are used to eliminate the step difference as shown in the figure.
The photoconductor film 17 is formed on a surface as smooth as possible. However, even with this configuration, the level difference on the substrate surface is not completely eliminated and image defects are likely to occur. Furthermore, the manufacturing process is complicated, and there is a high risk of defects due to pattern misalignment.
本発明は上記の点に鑑みなされたもので、固体走査部と
光電変換部を接続する新しい電極構成を導入し、光電変
換部の欠陥を減少した固体撮像装置を提供することを目
的とする。The present invention has been made in view of the above points, and an object of the present invention is to provide a solid-state imaging device in which defects in the photoelectric conversion section are reduced by introducing a new electrode configuration for connecting the solid-state scanning section and the photoelectric conversion section.
本発明は、蓄積ダイオードと走査部を集積形成した半導
体基板上に絶縁膜を介して光電変換膜を積層して構成さ
れる固体撮像装置において、光電変換膜の各画素領域に
設けられて蓄積ダイオードに接続される下部電極部分の
構造を、絶縁膜に形成されたコンタクト穴に表面が平坦
になるように充填された垂直電極部とこｆ″Ｌに接して
前記絶縁膜上に形成された平面電極部とから構成するこ
とを特徴とする。The present invention relates to a solid-state imaging device configured by laminating a photoelectric conversion film via an insulating film on a semiconductor substrate in which a storage diode and a scanning section are integrated, and in which a storage diode is provided in each pixel region of the photoelectric conversion film. The structure of the lower electrode part connected to the insulating film is the structure of the vertical electrode part filled in the contact hole formed in the insulating film so that the surface is flat, and the planar electrode part formed on the insulating film in contact with f''L. It is characterized by consisting of:
本発明によれば、光電変換膜を設ける面を平坦化して画
像欠陥の発生を効果的に防止することができる。また電
極構造、製造工程とも従来より簡単になジ、従って歩留
り向上も図られる。According to the present invention, it is possible to flatten the surface on which the photoelectric conversion film is provided and effectively prevent the occurrence of image defects. Furthermore, the electrode structure and manufacturing process are simpler than conventional ones, and yields can therefore be improved.
第２図は本発明の一実施例のインタライン転送形固体撮
像素子の一画素部分を示す断面図である。Ｐ型Ｓｔ基板
２θを用い、これにｎ＋層２１□を形成し、その上にゲ
ート醒化膜を介してポリＳｉから彦る転送ダート電極２
２１．２２２を形成して埋込みチャネル型の垂直読出し
ＣＯＤを構成し、これに隣ｉ妾して層層２１２により蓄
積ダイオードを構成している点は従来と同じでろる。こ
れらＣＣＤと蓄積ダイオードが形成きれた基板表面の酸
化膜２３は表面が平坦化されている。この酸化２３の層
層２１□上にコンタクト火があけられ、ここに金属など
の電機材料を六回が平坦になるように充填して垂直電極
部 ２４１を形成し、更にこの垂直電極部２４１に接し
て酸化膜２３上に平面電極部２４２を形成して、各画素
に対応する下部電極２４を構成している。そしてこの上
に、光導電体膜２５を積層し上部電極として全面に透明
導電膜２６を形成している。FIG. 2 is a sectional view showing one pixel portion of an interline transfer type solid-state image sensor according to an embodiment of the present invention. A P-type St substrate 2θ is used, an n+ layer 21□ is formed on it, and a transfer dirt electrode 2 is formed on the poly-Si layer through a gate dielectric film.
21 and 222 are formed to constitute a buried channel type vertical readout COD, and a layer 212 adjacent to this constitutes a storage diode, which is the same as in the conventional case. The surface of the oxide film 23 on the surface of the substrate on which these CCDs and storage diodes have been formed is flattened. A contact hole is opened on the layer 21□ of the oxide 23, and an electric material such as metal is filled in the hole six times to form a vertical electrode portion 241. A planar electrode portion 242 is formed on the oxide film 23 in contact with the oxide film 23 to constitute a lower electrode 24 corresponding to each pixel. A photoconductor film 25 is laminated thereon, and a transparent conductive film 26 is formed over the entire surface as an upper electrode.
この構造を得る具体的な製造工程例を第３図を参照して
説明する。なお、第２図と対応する部分には第２図と同
一符号を付しである。第３図（ａ）は従来と同様の工程
で形成σれる。例えば、Ｐ型ｓｔ基板２ｏにまずｎ＋層
２１工 、２１２を拡散形成し、この上にｒ−）酸化膜
を介してポリシリコンからなる転送ダート電極２２１
。A specific example of the manufacturing process for obtaining this structure will be explained with reference to FIG. 3. Note that parts corresponding to those in FIG. 2 are given the same reference numerals as in FIG. 2. In FIG. 3(a), the structure σ is formed by the same process as the conventional method. For example, first, the n+ layers 21 and 212 are formed by diffusion on the P-type st substrate 2o, and then the transfer dart electrodes 221 made of polysilicon are placed on top of the n+ layers 21 and 212 through an r-) oxide film.
.
２２２を形成する。この表面全体は熱酸化膜を含む第一
酸化膜２３１でおおわれるが、凹凸がある。そこで次に
、同図（ｂ）に示すようにＣＶＤ法などによ、！ｌｌｌ
第二酸化膜２３□を厚く堆積し、更にレジスト膜２７を
塗布して表面を略平坦化する。そして、レジスト膜２７
と第二酸化膜２３２に対してエツチング速匣が等しくな
る条件の反応性イオンエツチング（ＲＩＥ）法により全
面エツチングを行って同図（ｃ）の構造を得る。こうし
て酸化膜２３の表面を平坦化した後、同図（ｄ）に示す
ように、レジスト膜２８をマスクとしてＲＩＥ法により
蓄積ダイオードのｎ 層２１□上にコンタクト穴をあけ
、全面に金属膜２９を薄く被着する。この金属膜２９は
、コンタクト穴に電気メッキにより電極を充填するため
に設けるもので、Ｎｉ 、 Ｃｕ 、 Ｐｂ、ＡＡ、Ｚ
ｎ、Ｔｉ ｔＭｏ等力１ら選ばれる。そしてレジスト、
ｙ２ｓを除去することでコンタクト穴の円にのみ金属膜
２９を残し、同図（ｅ）に示すように電気メツキ法によ
ってこのコンタクト穴に垂直電極部２４□を充填し、更
にＡＡ等の金属膜の蒸着、パターニングにょ広平面電極
部２４２を形成して、下部電極２４を作る。222 is formed. This entire surface is covered with a first oxide film 231 including a thermal oxide film, but there are irregularities. Then, as shown in Figure (b), we applied the CVD method, etc.! lll
A second oxide film 23□ is deposited thickly, and a resist film 27 is further applied to substantially flatten the surface. Then, the resist film 27
The entire surface is etched by reactive ion etching (RIE) under conditions such that the etching rate is equal to that of the second oxide film 232, thereby obtaining the structure shown in FIG. 2(c). After the surface of the oxide film 23 has been planarized in this manner, as shown in FIG. 2D, a contact hole is made on the n layer 21□ of the storage diode by RIE using the resist film 28 as a mask, and a metal film 23 is formed on the entire surface. be applied thinly. This metal film 29 is provided to fill the contact hole with an electrode by electroplating, and is made of Ni, Cu, Pb, AA, Z.
n, Ti tMo etc. 1 are selected. and resist,
By removing y2s, the metal film 29 is left only in the circle of the contact hole, and as shown in FIG. The lower electrode 24 is formed by vapor deposition and patterning to form a wide planar electrode portion 242.
なお電気メッキは例えばニッケルメッキであり、次のよ
うに行う。まず、付着性を良くするためにダブルジンケ
ート法による表面処理を行う。次に通称ワット浴と呼ば
れるメッキ液で電気メッキを行うが、このとき微細な多
くのコンタクト穴に一様にメッキを行うために、ワット
浴の濃度を通常の凭に希釈し、またメッキ液を攪拌ファ
ンにより十゛分に攪拌する・これらのメッキ条件は実験
的に求められたもので、これによジ微細なコンタクト穴
に一様にニッケルを埋込むことができた。Note that the electroplating is, for example, nickel plating, and is performed as follows. First, surface treatment is performed using a double zincate method to improve adhesion. Next, electroplating is carried out using a plating solution commonly known as a Watts bath.In order to uniformly plate many fine contact holes, the concentration of the Watts bath is diluted to the same level as a normal plating solution. Stir thoroughly with a stirring fan. These plating conditions were determined experimentally and made it possible to uniformly fill the minute contact holes with nickel.
このようにして下部電極２４を形成した後、第３図（ｆ
）に示すように、ａ−８ｔなどからなる光導電体膜２５
を全面に形成し、更に上部電極とじて透明導電膜２６を
全面に形成して完成する。After forming the lower electrode 24 in this way, FIG.
), a photoconductor film 25 made of a-8t, etc.
is formed on the entire surface, and a transparent conductive film 26 is further formed on the entire surface as an upper electrode to complete the process.
この実施例によれは、従来の第１図の固体撮像素子にお
けるように二重の電極をはりめぐらすことなく、簡単な
構成で蓄積ダイオードと光導電体膜を直接結合する下部
電極が形成できる。According to this embodiment, a lower electrode that directly connects the storage diode and the photoconductor film can be formed with a simple structure, without having to wrap double electrodes as in the conventional solid-state imaging device shown in FIG.
また工程の短縮化により歩留り向上も期待でき、更に平
坦化面に平面電極部が形成されるため表面の凹凸段差は
平面電極部の厚みだけとなり、上部の光導電体膜に対し
ても十分な平滑面を提供できる。従来構造では段差を少
なくするため、例えば光導電体膜を必要以上に厚くして
光導電体膜自身にも段差解消の役割をもたせていた。In addition, an improvement in yield can be expected due to the shortening of the process.Furthermore, since the planar electrode portion is formed on the flattened surface, the only unevenness level difference on the surface is the thickness of the planar electrode portion, and there is sufficient thickness for the photoconductor film on the top. Can provide a smooth surface. In the conventional structure, in order to reduce the level difference, for example, the photoconductor film was made thicker than necessary so that the photoconductor film itself also had the role of eliminating the level difference.
このため光導電体膜厚は例えば４μｍにもｒム電界が十
分に膜中に印加されず、また光入射が透明導電膜側から
行われるため信号電荷が膜中を十分走行できずに消滅す
る等の理由により、光電感度を損うことが多い。これに
対し本実施例では光導電体膜は２μｍ又はこれ以下でも
よく、大きな光電感度が得られる。For this reason, even when the photoconductor film thickness is, for example, 4 μm, a sufficient rm electric field is not applied to the film, and since light is incident from the transparent conductive film side, signal charges cannot sufficiently travel through the film and disappear. For these reasons, photoelectric sensitivity is often impaired. On the other hand, in this embodiment, the photoconductor film may be 2 μm or less, and a high photoelectric sensitivity can be obtained.
そして本実施例によれば、上述のように段差が少ないた
め、白キズや素地ムラなどと呼ばれるノイズが少なくな
り、高画質の出画が可能となる。According to this embodiment, since there are fewer steps as described above, noise called white scratches and unevenness on the substrate is reduced, and high-quality images can be output.
更に蓄積ダイオードへの垂直電極部の形成工程は素子チ
ップ中の他のコンタクトホールの形成工程、電極配線工
程と同時にでき、この点でも工程の短縮が図られる。Furthermore, the step of forming the vertical electrode portion of the storage diode can be performed at the same time as the step of forming other contact holes in the element chip and the step of wiring the electrodes, and in this respect as well, the steps can be shortened.
次に上記実施例と同様の構造を得る別の製造工程側を第
４図（、）〜（ｈ）を用いて説明する。第２図、第３図
と対応する部分にはやはり同一符号を付しである。第４
図（、）〜（ｃ）の工程は第３図（ａ）〜（Ｃ）と同じ
である。本実施例では平坦化した酸化膜２３の表面に、
第４図（ｄ）に示すようにまず平面電極部２４２を先に
形成する。この後同図（ｅ）に示すようにレジスト膜３
０４マスクとしてＲＩＥ法により討層２１２上にコンタ
クト穴を形成する。そして次に同図（ｆ）に示すように
金属膜を十分厚く被着してコンタクト穴を充填する垂直
電極部２４１を形成する。この後、レジスト膜３０をは
くシして同図（ｇ）に示すように不要な金属膜をリフト
オフレ、この上に同図（ｈ）に示すように光導電体膜２
５、次いで透明導電膜２６を形成して完成する。Next, another manufacturing process for obtaining a structure similar to that of the above embodiment will be explained with reference to FIGS. 4(,) to (h). Portions corresponding to those in FIGS. 2 and 3 are designated by the same reference numerals. Fourth
The steps in FIGS. 3(a) to 3(c) are the same as those in FIGS. 3(a) to 3(c). In this embodiment, on the surface of the planarized oxide film 23,
As shown in FIG. 4(d), the planar electrode portion 242 is first formed. After that, as shown in FIG. 3(e), the resist film 3
A contact hole is formed on the substrate layer 212 using the RIE method as a 04 mask. Then, as shown in FIG. 2F, a metal film is deposited sufficiently thickly to form a vertical electrode portion 241 that fills the contact hole. After that, the resist film 30 is peeled off and the unnecessary metal film is lifted off as shown in FIG.
5. Next, a transparent conductive film 26 is formed to complete the process.
本実施例によっても、先の実施例と同様の効果が得られ
ることは明らかである。It is clear that this embodiment also provides the same effects as the previous embodiment.
以上の各実施例では、表面平滑化のため第一酸化膜上に
第二酸化膜を重バたが、第一酸化膜を十分厚としてこれ
だけで平坦化を行ってもよい。また垂直電極°部の形成
方法は、上記各実施例に限らず、無電解メッキ法やイオ
ンブレーティング法を用いることができ、またコンタク
ト穴が大きい場合にはハンダやＣＶＤによる充填を行っ
てもよい。In each of the above embodiments, the second oxide film is layered over the first oxide film in order to smooth the surface, but the first oxide film may be made sufficiently thick and planarization can be performed by itself. In addition, the method for forming the vertical electrode portion is not limited to the above-mentioned embodiments; electroless plating or ion blating may be used, and if the contact hole is large, it may be filled with solder or CVD. good.
第５図は更に他の実施例で、酸化膜の平坦化を行わず、
第３図（ａ）、第４図（、）の状態の酸化膜２３１にそ
のままコンタクト穴をあけて垂直電極部２４１と平面電
極部２４□〃）らなる下部電極２４を形成したものであ
る。光導電体膜が低真空中で形成され、凹凸のめる面に
被覆性よく堆積できる場合には、このように必ずしも表
面平坦化を行わなくてもよい。FIG. 5 shows yet another embodiment in which the oxide film is not flattened.
A contact hole is directly formed in the oxide film 231 in the state shown in FIGS. 3(a) and 4(a) to form a lower electrode 24 consisting of a vertical electrode portion 241 and a planar electrode portion 24□〃). If the photoconductor film is formed in a low vacuum and can be deposited with good coverage on a surface that accommodates irregularities, it is not necessary to flatten the surface as described above.
また表面平坦化の方法として、例えばＰＳＧ膜を堆積し
てＮ２ガス中、１１００℃程で熱処理してＰＳＧ膜をメ
ルトさせる方法を用いることも可能である。Further, as a method for surface planarization, it is also possible to use, for example, a method in which a PSG film is deposited and heat-treated at about 1100° C. in N2 gas to melt the PSG film.
更に以上の実施例では、信号電荷走査部として埋込みチ
ャネル型垂直読出しＣＣＤをもつインタライン転送形Ｃ
ＯＤを前提としたが、ＭＯＳ形やＣＰＤ形の走査部をも
つものにも本発明を適用できる。また絶縁膜としてＳ
Ｌｏ ２等の酸化膜を用いた例を説明したが、Ｓｉ３Ｎ
４膜やこれらの複合膜を用いることもできる。光導体膜
としてもａ −３ｉの他、５ｂ２ｓ５１ Ｓｅ −Ａａ
−Ｔｅ ｙ ＣｄＳｅ ｐ ＣｄＺｎＴｅなどを用い
得ることは明らかであり、また光導電膜で外く、当起電
力を生ずる膜を用いてもよい。Furthermore, in the above embodiment, an interline transfer type CCD having a buried channel type vertical readout CCD is used as a signal charge scanning section.
Although OD is assumed, the present invention can also be applied to those having a MOS type or CPD type scanning section. Also, as an insulating film, S
An example using an oxide film such as Lo2 was explained, but Si3N
4 membranes or a composite membrane thereof can also be used. In addition to a-3i, 5b2s51 Se-Aa can also be used as a photoconductor film.
-Te y CdSe p CdZnTe etc. can obviously be used, and in addition to the photoconductive film, a film that generates the same electromotive force may also be used.
更に下部電極材料としては、ＮｉやＡｔの他、Ａｕ。Further, as the lower electrode material, in addition to Ni and At, Au can be used.
Ａｇ 、 Ｐｔ ｌ Ａ／！、−８ｔ ｌ Ｘｎ ｔ
Ｓｎなどの金属あるいはポリＳｔなどを適宜組合せて用
いることができることは明らかである。Ag, Pt l A/! , -8t l Xn t
It is clear that metals such as Sn or polySt can be used in appropriate combinations.
第１図は従来の固体撮像素子の一画素部分を示す断面図
、第２図は本発明の一実施例の固体撮像素子の一画素部
分を示す断面図、第３図（、）〜（ｆ）はその製造工程
例を示す図、第４図（ａ）〜改）
（６）は他の製造工程例を示す図、第５図は他の実施例
の固体撮像素子の一画素部分を示す断面図である。
２０・・・Ｐ型Ｓｔ基板、２１．・・・ｎ＋層（埋込み
チャネル部）、２１２・・・ｎ＋層（蓄積ダイオード部
）、２２０，２２□・・・転送ダート電極、 ２３（２
３１゜２３□ ）・・・酸化膜、２４１・・・垂直電極
部、２４２・・・平面電極部、２４・・・下部電極、２
５・・・光導電体膜、２６・・・透明導電膜。
第１図
１８
第２図
４
第３図
第３図
第４図FIG. 1 is a cross-sectional view showing one pixel portion of a conventional solid-state image sensor, FIG. 2 is a cross-sectional view showing one pixel portion of a solid-state image sensor according to an embodiment of the present invention, and FIGS. ) is a diagram showing an example of the manufacturing process, FIG. 4(a) - revised) (6) is a diagram showing another example of the manufacturing process, and FIG. 5 is a diagram showing one pixel part of a solid-state image sensor of another example. FIG. 20...P-type St substrate, 21. ...n+ layer (buried channel part), 212...n+ layer (storage diode part), 220, 22□...transfer dart electrode, 23 (2
31゜23□)... Oxide film, 241... Vertical electrode part, 242... Planar electrode part, 24... Lower electrode, 2
5... Photoconductor film, 26... Transparent conductive film. Figure 1 18 Figure 2 4 Figure 3 Figure 4
Claims (1)
荷を蓄積ダイオードとその信号電荷を読出す走査部を設
け、この上に絶縁膜を介して光電変換膜を設け、この光
電変換膜の各画素領域の下部電極を前記蓄積ダイオード
に接続させて構成される固体撮像装置において、前記下
部電極を、前記絶縁膜に形成されたコンタクト穴に表面
がほぼ平坦になるように充填されて前記蓄積ダイオード
に接続される垂直電極部と、この垂直電極部に接して前
記絶縁膜上に形成された平面電極部とから構成したこと
を特徴とする固体撮像装置。A semiconductor substrate is provided with a storage diode for storing signal charges corresponding to a plurality of pixels arranged in the array, and a scanning section for reading out the signal charge.A photoelectric conversion film is provided on this with an insulating film interposed therebetween. In a solid-state imaging device configured by connecting a lower electrode of each pixel region to the storage diode, the lower electrode is filled into a contact hole formed in the insulating film so that the surface is substantially flat, and the storage diode is connected to the lower electrode. 1. A solid-state imaging device comprising: a vertical electrode portion connected to a diode; and a flat electrode portion formed on the insulating film in contact with the vertical electrode portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57232814A JPS59119980A (en) | 1982-12-25 | 1982-12-25 | Solid state image pickup device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57232814A JPS59119980A (en) | 1982-12-25 | 1982-12-25 | Solid state image pickup device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59119980A true JPS59119980A (en) | 1984-07-11 |
| JPH0134509B2 JPH0134509B2 (en) | 1989-07-19 |
Family
ID=16945186
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57232814A Granted JPS59119980A (en) | 1982-12-25 | 1982-12-25 | Solid state image pickup device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59119980A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5557121A (en) * | 1991-11-08 | 1996-09-17 | Canon Kabushiki Kaisha | Laminated solid-state image sensing apparatus and method of manufacturing the same |
| US8232616B2 (en) | 2009-08-28 | 2012-07-31 | Fujifilm Corporation | Solid-state imaging device and process of making solid state imaging device |
| US8368058B2 (en) | 2009-08-28 | 2013-02-05 | Fujifilm Corporation | Photoelectric conversion element and imaging device |
| US8378397B2 (en) | 2009-08-28 | 2013-02-19 | Fujifilm Corporation | Solid-state imaging device, process of making solid state imaging device, digital still camera, digital video camera, mobile phone, and endoscope |
| JP2014225527A (en) * | 2013-05-15 | 2014-12-04 | キヤノン株式会社 | Detection device and detection system |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5114541B2 (en) | 2010-02-25 | 2013-01-09 | 富士フイルム株式会社 | Manufacturing method of optical sensor |
| JP5270642B2 (en) | 2010-03-24 | 2013-08-21 | 富士フイルム株式会社 | Photoelectric conversion element and imaging element |
-
1982
- 1982-12-25 JP JP57232814A patent/JPS59119980A/en active Granted
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5557121A (en) * | 1991-11-08 | 1996-09-17 | Canon Kabushiki Kaisha | Laminated solid-state image sensing apparatus and method of manufacturing the same |
| US8232616B2 (en) | 2009-08-28 | 2012-07-31 | Fujifilm Corporation | Solid-state imaging device and process of making solid state imaging device |
| US8368058B2 (en) | 2009-08-28 | 2013-02-05 | Fujifilm Corporation | Photoelectric conversion element and imaging device |
| US8378397B2 (en) | 2009-08-28 | 2013-02-19 | Fujifilm Corporation | Solid-state imaging device, process of making solid state imaging device, digital still camera, digital video camera, mobile phone, and endoscope |
| US8803211B2 (en) | 2009-08-28 | 2014-08-12 | Fujifilm Corporation | Solid-state imaging device, process of making solid state imaging device, digital still camera, digital video camera, mobile phone, and endoscope |
| JP2014225527A (en) * | 2013-05-15 | 2014-12-04 | キヤノン株式会社 | Detection device and detection system |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0134509B2 (en) | 1989-07-19 |
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