JP2003188368A - Manufacturing method for solid-state imaging device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method for a solid-state imaging device capable of restraining dark current while securing sufficient electrical connection of wiring layer to a substrate, etc. <P>SOLUTION: A sinter-anneal treatment is performed at about 350°C-400°C in temperature after forming a first protecting film 41. Each of wiring layer 30, polysilicon, or connection portion between electrodes 15, 16 and a substrate 10 comprising silicon are alloyed. Afterward, it, furthermore, a dangling bond existing in surfaces between a substrate 10 and an insulating film 14 in a vertical transfer portion 7 is eliminated, and a surface level between the substrate 10 and the insulating film 14 is reduced by forming a second protection film and performing a hydrogen-anneal treatment at lower temperature than that in the anneal processing, for example at 200°C-250°C temperature. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a solid-state image pickup device having an annealing process after forming an image pickup unit and a peripheral circuit unit.

[0002]

2. Description of the Related Art A CCD (Charge Coupled Device) solid-state image pickup device has a plurality of light receiving portions arranged in a matrix for photoelectric conversion, and a plurality of vertical transfer portions having a CCD structure corresponding to the light receiving portion array. It is configured. CC that transfers the signal charge from the image pickup unit to the output unit is provided at one end of the image pickup unit.
A horizontal transfer unit having a D structure is provided, and an output unit is connected to the final stage of the horizontal transfer unit. Further, a wiring layer or the like connected to the vertical transfer section and the horizontal transfer section is formed in another peripheral region of the image pickup section.

When the charge-voltage conversion gain of the output section is increased in order to increase the sensitivity of the CCD solid-state image pickup device, noise due to dark current becomes a problem. Most of the dark current in the CCD solid-state image sensor is in the vertical transfer portion, and in order to suppress it, it is necessary to stabilize the electrical characteristics of the interface between the silicon substrate and the insulating film made of silicon oxide or the like. come.

Generally, in the manufacture of semiconductor devices, for example, as disclosed in Japanese Unexamined Patent Publication No. 8-37163, hydrogen gas or hydrogen is used to stabilize the electrical characteristics of the interface between the silicon substrate and the insulating film. There is a process called hydrogen annealing in which heat treatment is performed in an atmosphere of a mixed gas of nitrogen and nitrogen, and a process called sintering annealing that promotes electrical bonding between a silicon substrate and metal wiring made of aluminum or the like. Have been to twice.

On the other hand, in the manufacturing process of the CCD solid-state image pickup device, the hydrogen annealing process and the sintering annealing process are generally performed at the same time.

That is, in the prior art, first, various impurity regions such as a light receiving portion are formed in an image pickup portion of a silicon substrate, and a vertical transfer portion and a horizontal transfer portion are formed with an insulating film interposed on the substrate. After forming the transfer electrodes, the wiring layers connected to the vertical transfer section, the horizontal transfer section, and the like are formed in the peripheral region of the imaging section.

After that, a protective film made of a silicon nitride film is formed on the entire surface of the silicon substrate by the plasma CVD method, and then an annealing process is performed in an atmosphere containing hydrogen or nitrogen to connect the wiring layer to the silicon substrate. A dark current in the light receiving part and the transfer register is reduced by forming an alloy layer in the silicon part and supplying hydrogen contained in the silicon nitride film to the silicon dangling bond of the silicon substrate to reduce the silicon dangling bond. I was going to do it.

Conventionally, since the dark current can be sufficiently suppressed by performing the annealing treatment that combines the sinter annealing and the hydrogen annealing as described above, the sinter annealing is particularly performed from the viewpoint of reducing the manufacturing process. Hydrogen anneal was not split into separate steps. Further, it was considered that the optimum processing temperature in the hydrogen annealing process and the optimum processing temperature in the sintering annealing process were almost the same.

[0009]

However, in order to further reduce the dark current in order to further increase the sensitivity of the solid-state imaging device in recent years, the temperature and time of hydrogen annealing for reducing the dark current are further optimized. There is a need to.

Here, the optimum temperature for hydrogen annealing is expected to be lower than the optimum temperature for sintering annealing. That is, regarding the sintering annealing, basically, the alloy layer is easily formed at a higher temperature for the purpose of forming an alloy layer of the wiring layer and the silicon substrate, and as a result,
It is possible to reduce the resistance in the connection portion.

On the other hand, the purpose of hydrogen annealing is to reduce the interface state by capturing hydrogen in the silicon dangling bond of the silicon substrate. The captured hydrogen atoms may be dissipated.

In the conventional case of performing the annealing treatment that combines the hydrogen annealing and the sintering annealing, the temperature condition for forming the alloy between the metal wiring layer and the silicon substrate or the polysilicon forming the transfer electrode is prioritized. ,
There is a problem that the dark current cannot be reduced sufficiently.

The present invention has been made in view of the above circumstances, and an object thereof is to provide a solid-state image pickup device capable of suppressing dark current while ensuring sufficient electrical connection of a wiring layer to a substrate or the like. It is to provide a manufacturing method.

[0014]

In order to achieve the above object, a solid-state image pickup device of the present invention comprises a step of forming an image pickup portion on a substrate and a wiring layer for driving the image pickup portion at a peripheral portion of the substrate. A step of forming, a step of performing a heat treatment at a first temperature capable of forming an alloy layer in a connection portion between the wiring layer and the substrate in the peripheral portion, and a defect of the substrate on the substrate in the imaging unit. Forming a trapping atom-containing film containing trapping atoms that can be trapped in the substrate, and a second temperature lower than the first temperature, which is capable of diffusing the trapping atoms toward the substrate and trapping the defects in the substrate. And a step of performing a heat treatment on.

After the step of forming the wiring layer, the first
Before the step of performing the heat treatment at the temperature of, a step of forming a protective film that covers at least the wiring layer in the peripheral portion and relaxes the thermal expansion of the wiring layer due to the heat treatment at the first temperature is further formed. Have.

In the step of forming the trapped atom-containing film, a hydrogen-containing film is formed. In the step of forming the hydrogen-containing film, a silicon nitride film containing hydrogen is formed.

In the step of performing the heat treatment at the second temperature, the heat treatment is performed in an atmosphere containing at least either hydrogen gas or nitrogen gas.

In the above-described method for manufacturing a solid-state image pickup device of the present invention, after the image pickup section and the wiring layer are formed on the substrate, first,
The heat treatment is performed at a first temperature at which an alloy layer can be formed in the peripheral portion where the wiring layer and the substrate are connected. As a result, the resistance at the connection between the wiring layer and the substrate can be reduced.
After that, a trapping atom-containing film containing trapping atoms that can be trapped by the defects of the substrate is formed on the substrate in the imaging unit, and the trapping atoms are diffused toward the substrate at a temperature lower than the first temperature and trapped by the defects of the substrate. The heat treatment is performed at a second temperature that allows the heat treatment. In this way, the heat treatment step for forming the alloy layer in the connection portion between the wiring layer and the substrate in the peripheral portion and the heat treatment step for trapping trapped atoms in the defects of the substrate are separately performed, thereby achieving the respective purposes. The heat treatment can be performed at an optimum temperature according to the above. At this time, since the first temperature in the heat treatment step for forming the alloy layer is usually higher than the second temperature in the heat treatment step for trapping trapped atoms into the result of the substrate, it is necessary to form the alloy layer. By performing the heat treatment step 1) first and then performing the heat treatment at the second temperature lower than the first temperature, the trapped trapped atoms are not scattered to the outside.

[0019]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of a method for manufacturing a solid-state image pickup device of the present invention will be described below with reference to the drawings.

FIG. 1 is a schematic configuration diagram showing an example of a solid-state image pickup device according to this embodiment. The solid-state imaging device 1 according to this embodiment includes an imaging unit 2, a horizontal transfer unit 3, and an output unit 4. The output unit 4 has, for example, a charge-voltage conversion unit configured by a floating diffusion.

The image pickup section 2 includes a pixel 8 including a light receiving section 5 for performing photoelectric conversion, a readout gate section 6 and a vertical transfer section 7.
Are arranged in a planar matrix. Each pixel 8 is separated by a channel stopper (not shown) so as not to electrically interfere with each other.

The vertical transfer units 7 are commonly provided for each column of the light receiving units 5 and arranged in a predetermined number. The four-phase clock signals φV1 and φV for driving the vertical transfer unit 7 are provided to the image pickup unit 2.
2, φV3 and φV4 are input. Two-phase clock signals φH1 and φH2 for driving the horizontal transfer unit 3 are input to the horizontal transfer unit 3.

The horizontal transfer section 3 and the vertical transfer section 7 described above.
Consists of a potential well of minority carriers formed by introducing impurities into the surface side of the semiconductor substrate and a plurality of electrodes (transfer electrodes) formed on the substrate with an insulating film interposed therebetween so as to be insulated and separated from each other. It is configured. The clock signals .phi.V1, .phi.V2, .phi.V3, .phi.V4, .phi.H1 and .phi.H2 are applied to the transfer electrodes 3 and 7 with their phases periodically shifted. These transfer units 3 and 7 are controlled by the clock signal applied to the transfer electrodes to sequentially change the potential distribution of the potential well described above, and transfer the charges in the potential well in the phase shift direction of the clock signal. Functions as a shift register.

FIG. 2 is an enlarged plan view showing a portion A of FIG. As shown in FIG. 2, the rectangular light receiving unit 5 is
A plurality are arranged in a matrix in the horizontal and vertical directions.

Between the light receiving portions 5 arranged in a matrix, the first transfer electrodes 15 made of polysilicon of the first layer are formed extending in the horizontal direction. The first transfer electrode 15 has a rectangular shape slightly extending in the vertical direction on both sides of the light receiving unit 5.

On the first transfer electrode 15, a second transfer electrode 16 made of second layer polysilicon is extended. The second transfer electrode 16 has a rectangular shape that extends so as to overlap the first transfer electrodes 15 that are vertically adjacent to each other on both sides of the light receiving unit 5.

As described above, the transfer electrodes 15 and 1
6 includes four-phase clock signals φV1, φV2, φV3.
φV4 is applied. Therefore, the first transfer electrode 15
Has a first transfer electrode 15a of the second phase to which the clock signal φV2 is applied and a first transfer electrode 15b of the fourth phase to which the clock signal φV4 is applied. Further, the second transfer electrode 16 has the second phase of the first phase to which the clock signal φV1 is applied.
3 to which the transfer electrode 16a and the clock signal φV3 are applied
It has the second transfer electrode 16b of the phase. Like this, 4
Four transfer electrodes 15a to which a phase clock signal is applied,
The image pickup unit 2 of FIG. 1 includes 15b, 16a, and 16b as a set.
The transfer electrodes are repeatedly arranged on the entire surface of.

FIG. 3 is a diagram schematically showing a schematic configuration of the entire chip including the peripheral circuit section of the image pickup section 2. Transfer electrodes 15a, 15b, 16 are provided along the three sides around the image pickup unit 2.
A wiring layer 30 having four wiring layers 30a, 30b, 30c, 30d for supplying any of the four-phase clock signals to a and 16b is arranged side by side. Wiring layer 3
0a is the second transfer electrode 16a of the first phase, the wiring layer 30b is the first transfer electrode 15a of the second phase, the wiring layer 30c is the second transfer electrode 16b of the third phase, and the wiring layer 30d is the fourth phase. First of
The transfer electrodes 15b are connected to the transfer electrodes 15b via left and right contacts, respectively.

FIG. 4 is a sectional view taken along the line AA 'in FIG. As shown in FIG. 4, for example, a p-type silicon substrate or a p-type well (hereinafter referred to as a substrate) 10 formed on the silicon substrate is mainly composed of, for example, an n-type impurity region and a pn junction with the substrate 10. A light receiving portion 5 is formed which performs photoelectric conversion in a region to generate signal charges and accumulates the signal charges on a certain substrate.

A charge transfer portion 13 mainly composed of an n-type impurity region is formed at a predetermined distance in one adjacent region of the light receiving portion 5, and although not shown, the light receiving portion 5 and the charge transfer portion are not shown. Between 13 is p which forms a variable potential region.
A read gate portion including a type impurity region is formed. Further, in the other adjacent region of the light receiving portion 5, a charge transfer portion 13 'composed of an n-type impurity region is formed at a predetermined distance, and although not shown, the light receiving portion 5 and the charge transfer portion are not shown. Between 13 ', a channel stopper made of a high-concentration p-type impurity region is formed deep in the substrate.

An insulating film 14 of silicon oxide or the like is formed on the substrate 10, and a second layer of polysilicon is formed in a region (not shown) on the charge transfer portions 13 and 13 'via the insulating film 14. The first transfer electrode 15 is formed. A second transfer electrode 16 made of polysilicon of the second layer is formed on the substrate 10 via an insulating film 14, and the second transfer electrode 16 has a part thereof via the insulating film. It is formed so as to overlap the first transfer electrode 15.
The charge transfer portions 13 and 13 'and the transfer electrode 1 shown in FIG.
Reference numerals 5 and 16 correspond to the vertical transfer unit 7 shown in FIG.

A light-shielding film 17 made of a refractory metal such as tungsten (W) is formed on the insulating film 14 so as to cover the transfer electrodes 15 and 16, and the light-shielding film 17 receives light. An opening 17a is formed above the portion 5. The light shielding film 17 is formed so as to cover the transfer electrodes 15 and 16 because the charge transfer portion 1 of the light shielding film 17 is formed.
This is because the light-shielding property with respect to 3, 13 'is enhanced and smear is suppressed.

The light shielding film 17 and the insulating film 14 in the opening 17a are covered to cover the entire surface with, for example, BPSG (Boropho
A flattening film 20 made of, for example, sposilicate glass) is formed, and the surface of the flattening film 20 is flattened.

The flattening film 20 is coated to cover the entire surface, for example,
A protective film 40 is formed by sequentially stacking a first protective film 41 and a second protective film 42 made of silicon nitride.

An on-chip color filter 50 is formed on the protective film 40. On-chip color filter 5
0 is colored red (R), green (G), or blue (B) in the primary color coding system, and is cyan (Cy) or magenta (M) in the complementary color system.
g), yellow (Ye), green (G), or the like.

An on-chip lens (OCL) 60 made of a light-transmitting material such as a negative photosensitive resin is formed on the on-chip color filter 50. On-chip lens 6
0 is formed so as to minimize the gap that becomes the ineffective region, because the light above the light-shielding film is also effectively used to enter the light-receiving portion 5.

FIG. 5 shows the transfer electrodes 15 and 1 shown in FIG.
6 is a cross-sectional view of a connection portion between the wiring 6 and the wiring layers 30a to 30d. As shown in FIG. 5, the substrate 10 in the peripheral circuit section
An element isolation insulating film 1 made of a silicon oxide film or the like is formed on the top.
1 is formed, and the first and second transfer electrodes 15 and 16 are formed on the element isolation insulating film 11 so as to extend to the peripheral circuit portion.

The flattening film 20 in the above-mentioned image pickup section 2 is formed also in the peripheral circuit section so as to cover the transfer electrodes 15 and 16, and the flattening film 20 has a contact hole CH formed therein. In the contact hole CH and on the flattening film 20, wiring layers 30a to 30d made of aluminum and to which a clock signal is applied are formed. The junctions between the wiring layers 30a to 30d and the first and second transfer electrodes 15 and 16 made of polysilicon are alloyed by heat treatment to ensure good ohmic contact between them.

The flattening film 20 so as to cover the wiring layer 30.
On the upper part, a protective film 40 in which the first protective film 41 and the second protective film 42 in the image pickup section are laminated is also formed in the peripheral circuit section, and further, in the image pickup section 2, the on-chip lens 60 and the on-chip lens 60 are formed. The lens material 60a is formed.

FIG. 6 is a sectional view of the output section 4 shown in FIG. As shown in FIG. 6, in the output section 4, the substrate 11 is provided with a floating diffusion FD and a reset diffusion RD each made of an n-type impurity region.
Are formed. An insulating film 14 made of silicon oxide or the like formed in the imaging unit 2 is formed on the substrate 10, and the reset film covered with the insulating film 14 is formed on the substrate 10 between the floating diffusion FD and the reset diffusion RD. The gate RD is formed. The reset gate RD is formed of, for example, the first layer polysilicon or the second layer polysilicon in the imaging unit 2.

A flattening film 20 in the image pickup section 2 is formed so as to cover the insulating film 14, a contact hole CH is formed in the flattening film 20, and the inside of the contact hole CH and the flattening film 20 are formed. Wiring layers 30e and 30f made of, for example, aluminum are formed on the top. The joint between the wiring layers 30e and 30f and the substrate 10 on which the floating diffusion FD and the reset diffusion RD are formed is alloyed by heat treatment, and good ohmic contact between them is secured. The wiring layers 30a to 30f are formed of, for example, aluminum wiring in the same layer.

The floating diffusion FD is
In a region (not shown), the input of the buffer amplifier formed on the substrate 10 is connected via the wiring layer 30e.
The buffer amplifier detects and amplifies a potential change due to the signal charges sent from the horizontal transfer unit 3 to the floating diffusion FD. The output of the buffer amplifier is connected to the output terminal of the image pickup signal, and the time-series image pickup signal is sequentially output from this output terminal.

The reset diffusion RD is held at a constant voltage via the wiring layer 30f.

Although not shown, the reset gate RD is also connected to a similar wiring layer made of aluminum or the like, and after the detection of signal charges for one pixel is completed in the reset gate RD via the wiring layer. , Reset gate R
A reset pulse is applied to D, and the two diffusions FD and RD are brought into conduction. As a result, the signal charges in the floating diffusion FD are swept to the reset diffusion RD. An image pickup signal is generated by repeating the above-described detection and amplification of signal charges and this reset operation for each pixel.

As described above, the solid-state image pickup device 1 having the above structure
In addition, there are many connecting portions between the wiring layer 30 made of a metal such as aluminum and the silicon forming the silicon substrate 10 or the polysilicon forming the transfer electrodes 15 and 16 other than those shown in the figure. It is necessary to secure proper electrical connection. Further, it is necessary to reduce the silicon dangling bond at the interface between the silicon substrate 10 and the insulating film 14 in the imaging unit 2 for the purpose of reducing the dark current in the imaging unit 2. The manufacturing method of the solid-state imaging device according to the present embodiment based on the above will be described below.

7 to 12 are process cross-sectional views for explaining the method of manufacturing the solid-state image pickup device according to the present embodiment. In each drawing, (a) is a cross-sectional view of the image pickup section corresponding to FIG. 5B is a cross-sectional view of the peripheral circuit portion corresponding to FIG. 5, and FIG. 7C is a cross-sectional view of the output portion corresponding to FIG.

First, the manufacturing process up to the structure shown in FIG. 7 will be described. According to a known method, after forming the element isolation insulating film 11 at a predetermined position in the peripheral circuit portion of the silicon substrate 10, various impurity regions in the silicon substrate are formed. That is, in the image pickup unit 2, a channel stopper (not shown) is formed by ion-implanting into a p-type silicon substrate or a p-type well (hereinafter referred to as a substrate) 10 formed on the silicon substrate under predetermined conditions, thereby forming a charge. The transfer units 13 and 13 'are formed, and a read gate unit (not shown) is formed. Then, thermal oxidation or CVD (Chem) is performed on the substrate 10 on which various impurity regions are formed.
The insulating film 14 is formed by depositing a silicon oxide film or the like by the ical vapor deposition method. Then, the imaging unit 2
On the insulating film 14 in FIG. 1C, a first layer of polysilicon, which has been doped with impurities to increase its conductivity, is deposited by a CVD method, and the polysilicon is patterned to form a first transfer electrode 15 in a region (not shown). To do. Then, the first transfer electrode 15 and the substrate 10 are covered, and, for example,
The insulating film 14 made of silicon oxide is formed, and the second transfer electrode 16 made of polysilicon of the second layer is formed on the first transfer electrode 15 through the insulating film 14 to form the second transfer electrode 16. The insulating film 14 is formed by coating. Also in the peripheral circuit portion, the reset gate RG made of the first-layer or second-layer polysilicon is formed. continue,
In the imaging section 2, n-type impurities are ion-implanted under predetermined conditions using the transfer electrodes 15 and 16 to form the light-receiving section 5, and in the output section, n-type impurities are ion-implanted using the reset gate RG as a mask. Floating Diffusion FD and Reset Diffusion R
Form D. Furthermore, in the imaging unit 2, the transfer electrode 1
A refractory metal film of tungsten (W) or the like is deposited on the insulating film 14 by a CVD method so as to cover the insulating films 5 and 16, and the refractory metal film is provided above the light receiving portion 5 with the opening 17a.
The light shielding film 17 is formed by patterning so as to have As described above, the structure shown in FIG. 7 is formed.

Next, as shown in FIG. 8, a BPSG film is deposited on the entire surface of the image pickup section 2 and the peripheral circuit section by a CVD method and a reflow process is performed to make the surface planarized. To form.

Next, as shown in FIG. 9, in the peripheral circuit portion, a contact hole CH is formed at a substrate portion to be connected to a wiring layer to be formed later or a portion where the transfer electrodes 15 and 16 made of polysilicon are formed. To form. Then, aluminum is deposited in each contact hole CH and on the flattening film 20 by a sputtering method and patterned. As a result, in the peripheral circuit section, the wiring layers 30a to 30d connected to the transfer electrodes 15 and 16 and
Wiring layer 2 connected to the floating diffusion FD and the reset diffusion RD in the output section
The wiring layers 30 such as 0e and 30f are formed.

Next, as shown in FIG. 10, silicon nitride of 500 nm is deposited on the flattening film 20 and the wiring layer 30 in the image pickup section 2 and the peripheral circuit section by the plasma CVD method.
The first protective film 41 is formed by depositing about 1 μm.
Then, for example, annealing is performed at a temperature of 350 ° C. to 400 ° C. for a time of about 30 minutes to 60 minutes (hereinafter, referred to as sintering annealing) to form each wiring layer 30 and an electrode or substrate made of polysilicon or silicon. Alloy the connection part of. Note that the sintering treatment after forming the first protective film 41 is called hillock because the annealing treatment is performed at a high temperature, for example, when the annealing treatment is performed in a state where aluminum is exposed, thermal expansion of aluminum causes the annealing. This is because the protrusions are formed, which causes a short circuit of the wiring and the like, which is suppressed.

Next, as shown in FIG. 11, silicon nitride of 300 nm to 500 nm is deposited on the first protective film 41 in the image pickup section 2 and the peripheral circuit section by the plasma CVD method.
The second protective film 42 is formed by depositing the second protective film 42. continue,
A lower temperature than the previous annealing step, for example, a temperature of 200
Annealing (hereinafter, referred to as hydrogen annealing) is performed at a temperature of 30 to 180 minutes for 30 to 180 minutes. The gas used in this hydrogen annealing treatment is 100% hydrogen gas, a mixed gas of hydrogen gas and nitrogen gas, nitrogen gas, or the like. Accordingly, since the second protective film 42 made of silicon nitride formed by the plasma CVD method contains a large amount of hydrogen, the hydrogen contained in the second protective film 42 is diffused by the heat treatment, By eliminating the dangling bond existing at the interface between the substrate 10 and the insulating film 14 in the vertical transfer section 7, the interface state between the substrate 10 and the insulating film 14 is reduced.

Next, as shown in FIG. 12, an on-chip color filter 50 is formed by, for example, a dyeing method on the protective film 40 formed of the first protective film 41 and the second protective film 42 in the image pickup section 2. To do. In the dyeing method, a polymer such as casein is added with a photosensitizer and applied, and exposure, development, dyeing and fixing are repeated for each color. In addition, the on-chip color filter 5 is formed by using a dispersion method, a printing method or an electrodeposition method
0 may be formed.

In the subsequent steps, for example, a lens material 60a such as a light-transmissive resin such as a negative photosensitive resin is formed on the entire surface of the image pickup section 2 and the peripheral circuit section, and the lens material 60a in the image pickup section 2 is formed. A lens-shaped resist pattern having a predetermined curvature is formed thereon, and the lens material 60a is processed by etching using the resist pattern as a mask to form the on-chip lens 60.
The solid-state imaging device shown in FIG. 6 can be manufactured.

According to the method for manufacturing the solid-state image pickup device of the present embodiment, after forming the first protective film 41, the sintering annealing process is performed at a temperature of about 350 ° C. to 400 ° C., and each wiring layer is formed. A connection portion between 30 and an electrode or substrate made of polysilicon or silicon is alloyed, and then a second protective film 42 is further formed. The temperature is lower than that in the previous annealing step, for example, the temperature is 200 ° C. to 350 ° C. At about ℃,
By performing the hydrogen annealing treatment, the dangling bond existing at the interface between the substrate 10 and the insulating film 14 in the vertical transfer portion 7 is eliminated, and the interface level between the substrate 10 and the insulating film 14 is reduced. In this way, the sinter annealing process and the hydrogen annealing process are separately provided, and the optimum processing temperature according to the purpose is adopted in each process to secure sufficient electrical connection of the wiring layer 30 to the substrate or the like. While suppressing dark current

The method of manufacturing the solid-state image pickup device of the present invention is not limited to the description of the above embodiment. For example, in the present embodiment, the first protective film made of silicon nitride is formed in order to prevent the generation of hillocks due to the thermal expansion of aluminum in the sintering annealing process, but the first protective film is made of another material. A film can also be formed. For example, in the case where an in-layer lens is formed by forming a recess corresponding to the step of the underlying layer on the flattening film 20 on the light receiving unit 5 and forming a protective film in the recess, the characteristics of the in-layer lens A material that also considers the above can be used for the first protective film.

Further, in this embodiment, the silicon nitride film formed by the plasma CVD method containing a large amount of hydrogen is formed as the second protective film 42 in order to reduce the silicon dangling bonds of the substrate 10. The material of the protective film 42 of No. 2 is not limited to this, and other films can be used, and if there is a film containing an impurity atom or the like that can reduce silicon dangling bonds, other than hydrogen, this film is adopted. You can also do it. Further, in the present embodiment, the CCD solid-state imaging device of the interline transfer system has been described as an example, but the transfer system is not limited, and the CMO can be used.
It can also be applied to an S-type solid-state imaging device and the like. Besides, various modifications can be made without departing from the scope of the present invention.

[0057]

According to the method of manufacturing a solid-state image pickup device of the present invention, it is possible to suppress dark current while ensuring sufficient electrical connection of the wiring layer to the substrate and the like.

[Brief description of drawings]

FIG. 1 is a schematic configuration diagram showing an example of a solid-state imaging device according to this embodiment.

FIG. 2 is an enlarged plan view showing a portion A of FIG.

FIG. 3 is a diagram schematically showing an arrangement example of an entire chip including a peripheral circuit section of an image pickup section of the solid-state image pickup device according to the present embodiment.

FIG. 4 is a cross-sectional view taken along the line A-A ′ in FIG.

FIG. 5 is a sectional view of a connection portion between a transfer electrode and a wiring layer in the solid-state imaging device according to the present embodiment.

FIG. 6 is a sectional view of an output unit of the solid-state imaging device according to the present embodiment.

FIG. 7 is a cross-sectional view after forming various impurity regions and transfer electrodes in the manufacture of the solid-state imaging device according to the present embodiment.

FIG. 8 is a cross-sectional view after a flattening film is formed in the manufacturing of the solid-state imaging device according to the present embodiment.

FIG. 9 is a cross-sectional view after a wiring layer is formed in the manufacturing of the solid-state imaging device according to the present embodiment.

FIG. 10 is a cross-sectional view after the formation of the first protective film in the manufacture of the solid-state imaging device according to the present embodiment.

FIG. 11 is a cross-sectional view after forming a second protective film in the manufacture of the solid-state imaging device according to the present embodiment.

FIG. 12 is a cross-sectional view after forming an on-chip color filter in the manufacturing of the solid-state imaging device according to the present embodiment.

[Explanation of symbols]

1 ... Solid-state imaging device, 2 ... Imaging unit, 3 ... Horizontal transfer unit, 4 ...
Output part, 5 ... Light receiving part, 6 ... Read gate part, 7 ... Vertical transfer part, 8 ... Pixel, 10 ... Substrate, 11 ... Element isolation insulating film, 13, 13 '... Charge transfer part, 14 ... Insulating film, 15 ，
15a, 15b ... First transfer electrodes, 16, 16a, 16b
... second transfer electrode, 17 ... light-shielding film, 20 ... planarizing film, 3
0, 30a, 30b, 30c, 30d, 30e, 30f
... Wiring layer, 40 ... Protective film, 41 ... First protective film, 42 ...
Second protective film, 50 ... On-chip color filter, 60
... on-chip lens.

   ─────────────────────────────────────────────────── ─── Continued front page    F-term (reference) 4M118 AA05 AB01 BA13 CA02 CA32                       CA33 DB06 DB08 DD04 DD09                       EA01 FA06 FA26                 5C024 CY47 EX43 EX51                 5F049 MA02 MB02 NA05 NB05 QA03                       RA02 SE01 SE09 SS03 SZ10                       SZ12 SZ20

Claims (5)

[Claims] 1. A step of forming an image pickup portion on a substrate, a step of forming a wiring layer for driving the image pickup portion on a peripheral portion of the substrate, and a step of connecting the wiring layer and the substrate on the peripheral portion. A step of performing a heat treatment at a first temperature capable of forming an alloy layer; a step of forming, on the substrate in the imaging unit, a capture atom-containing film containing capture atoms that can be captured by defects in the substrate; A method of manufacturing a solid-state imaging device, comprising: performing a heat treatment at a second temperature lower than the first temperature, which allows the trapped atoms to diffuse toward the substrate and be trapped by defects in the substrate. 2. After the step of forming the wiring layer, the first
Before the step of performing the heat treatment at the temperature of, a step of covering the wiring layer in at least the peripheral portion and forming a protective film that alleviates thermal expansion of the wiring layer due to the heat treatment at the first temperature is further formed. The method for manufacturing a solid-state imaging device according to claim 1. 3. The method for manufacturing a solid-state imaging device according to claim 1, wherein a hydrogen-containing film is formed in the step of forming the trapped atom-containing film. 4. In the step of forming the hydrogen-containing film,
The method for manufacturing a solid-state imaging device according to claim 3, wherein a silicon nitride film containing hydrogen is formed. 5. The method for manufacturing a solid-state imaging device according to claim 1, wherein in the step of performing the heat treatment at the second temperature, the heat treatment is performed in an atmosphere containing at least either hydrogen gas or nitrogen gas.