JPS6273661A - Solid-state image pickup device - Google Patents
Solid-state image pickup deviceInfo
- Publication number
- JPS6273661A JPS6273661A JP60212167A JP21216785A JPS6273661A JP S6273661 A JPS6273661 A JP S6273661A JP 60212167 A JP60212167 A JP 60212167A JP 21216785 A JP21216785 A JP 21216785A JP S6273661 A JPS6273661 A JP S6273661A
- Authority
- JP
- Japan
- Prior art keywords
- insulating layer
- electrodes
- electrode
- solid
- photoconductive film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000009499 grossing Methods 0.000 claims abstract description 13
- 239000004065 semiconductor Substances 0.000 claims abstract description 13
- 239000000758 substrate Substances 0.000 claims abstract description 11
- 238000003384 imaging method Methods 0.000 claims description 11
- 239000004020 conductor Substances 0.000 abstract description 8
- 239000004642 Polyimide Substances 0.000 abstract description 6
- 229920001721 polyimide Polymers 0.000 abstract description 6
- 229910018125 Al-Si Inorganic materials 0.000 abstract 2
- 229910018520 Al—Si Inorganic materials 0.000 abstract 2
- 230000001788 irregular Effects 0.000 abstract 1
- 238000001444 catalytic combustion detection Methods 0.000 description 6
- 229910021417 amorphous silicon Inorganic materials 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 241000519995 Stachys sylvatica Species 0.000 description 1
- UHYPYGJEEGLRJD-UHFFFAOYSA-N cadmium(2+);selenium(2-) Chemical compound [Se-2].[Cd+2] UHYPYGJEEGLRJD-UHFFFAOYSA-N 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000001755 magnetron sputter deposition Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14665—Imagers using a photoconductor layer
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明は固体のスイッチング走査素子と光導電膜とを組
み合わせた形の固体撮像装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a solid-state imaging device that combines a solid-state switching scanning element and a photoconductive film.
光導電膜を積層させた形の固体撮像装置は、受光素子と
して光導電膜を用い、高感度で低スミアという優れた特
徴を有する。このため監視用ＴＶカメラ等の多くのＴＶ
カメラに利用でき１次世代の固体撮像装置として開発が
盛んである。A solid-state imaging device in which a photoconductive film is laminated uses a photoconductive film as a light-receiving element and has excellent characteristics of high sensitivity and low smear. For this reason, many TVs such as surveillance TV cameras
It is being actively developed as a next-generation solid-state imaging device that can be used in cameras.
この種の固体撮像装置の一例としては、電荷転送機能を
有する半導体基板例えばＣＣＤ 、ｈに、光導電膜と透
明電極を順次積層させた形の構造のものがあり、これを
第３図により説明する。An example of this type of solid-state imaging device is one in which a photoconductive film and a transparent electrode are sequentially laminated on a semiconductor substrate having a charge transfer function, such as a CCD, and this is illustrated in FIG. do.
即ち、Ｐ型半導体基板■の一十面近くにはそれぞれｎ冬
型領域よりなる蓄積ダイオード■と垂直転送ＣＣＤ■と
が交互に形成され、この一体となったものがＰ＋型のス
トッパー領域（イ）により分離されている。またＰ型半
導体鎖板（１）ヒには絶縁膜■をそれぞれ介して転送電
極０．■からなる走査部が設けられている。また絶縁膜
０上にはコンタク＋−ホールを介して蓄積ダイオード■
と電気的に接続する導電性膜からなる第１電極（８）、
耐熱性有機絶縁物よりなる平滑化層０が順に形成され、
この平滑化層（９）ｌには第１電極（ハ）とヅ滑化層σ
〕）のコンタクトホール（１０）を介して電気的に接続
して絵素の寸法を決める第２電権（１１）が設けられて
いる。この第２１を極（１１）を含む平滑化層ｉ！〕）
上には感光部としての光導電膜（１２）が設けられ、こ
の光導電膜（１２）」−には、この光導電膜（１２）を
駆動する電圧印加用の透明電極（１３）が形成されてい
る。That is, storage diodes (2) and vertical transfer CCDs (2) each consisting of an n-winter type region are alternately formed near the tenth surface of the P-type semiconductor substrate (2), and this integrated structure forms a P+ type stopper region (A). Separated by In addition, the transfer electrodes 0, 1 and 2 are connected to the P-type semiconductor chain plate (1) through the insulating film (2), respectively. A scanning section consisting of (2) is provided. Also, on the insulating film 0, there is a storage diode ■ through the contact +- hole.
a first electrode (8) made of a conductive film electrically connected to the
A smoothing layer 0 made of a heat-resistant organic insulator is sequentially formed,
This smoothing layer (9)l includes a first electrode (c) and a smoothing layer σ.
]) A second power supply (11) is provided which is electrically connected through the contact hole (10) to determine the dimensions of the picture element. This 21st smoothing layer i! 〕)
A photoconductive film (12) as a photosensitive area is provided on the top, and a transparent electrode (13) for applying voltage to drive the photoconductive film (12) is formed on this photoconductive film (12). has been done.
またこの従来例における蓄積ダイオード■や転送電極（
６Ｄ、ｉ″ｔ）等の位置関係は、第７１図に示されてお
り、同図（ａ）はこれを透明電極（１３）側からみたと
きの１画素分に相当する概略平面図、同図（ｂ）。Also, in this conventional example, the storage diode ■ and the transfer electrode (
6D, i″t), etc. are shown in FIG. 71, where (a) is a schematic plan view corresponding to one pixel when viewed from the transparent electrode (13) side, and Figure (b).
（ｃ）はそれぞれ同図（ａ）のＡ−Ａ’線、ローＢ′線
を矢印方向にみたときの概略断面図を表わしている。同
図において第１１！極（８）は点線で囲まれた長方形の
部分であり、転送な極０．■が重なって最も高くなって
いるクロスハツチングで示した部分にコンタクトホール
（１０）を設ける。(c) shows a schematic cross-sectional view taken along line AA' and line B' of FIG. In the same figure, the 11th! Pole (8) is a rectangular part surrounded by a dotted line, and is a transfer pole 0. A contact hole (10) is provided in the area indicated by crosshatching, where 2 overlaps and is the highest.
ここでこのクロスハツチング部の幅Ｑ１は、第１及び第
２転送ｉｉ！極０．■トの１１荷を確実に転送する関係
Ｌ、できる限り小さい方が望ましい、通常は１ｐ以下で
ある。一方、コンタクトホール（１０）は平滑化層０を
貫通して形成するため、その直径Ｑ□を１．５１ｍ以下
にすることは製造Ｊ−非常に困難である。故に必然的に
ｙ ｌ＜ ９ ｘということなり、コンタクトホール（
ｌＯ）の底は急峻な段差になる。このため、第２電極（
１１）はコンタクＩ・ホール（１０）の部分で深い四部
が形成される。これに伴ない光導電ＩＪ’２（１２）を
形成する際のＦ地の平滑性は不充分になり、光導電膜（
１２）にクラックや膜質の劣化が発生することがあった
。またコンタクトホール（１０）をクロスハツチング部
以外に数本づることも考えられ、この場合コンタクトホ
ール（１０）の底の急峻な段差は低減されるが、コンタ
クトホール（１０）の深さは増すことになって、第２電
極（１１）のコンタク１−ホール（１０）での四部が深
くなり、結局［１カ述と同様の影響が生じる。Here, the width Q1 of this crosshatching portion is the first and second transfer ii! Extremely 0. (2) Reliably transferring the 11 cargoes, L is preferably as small as possible, usually less than 1p. On the other hand, since the contact hole (10) is formed through the smoothing layer 0, it is extremely difficult to make the diameter Q□ 1.51 m or less. Therefore, it is inevitable that y l < 9 x, and the contact hole (
The bottom of lO) becomes a steep step. For this reason, the second electrode (
11) has four deep parts formed at the contact I hole (10). As a result, the smoothness of the F base when forming the photoconductive IJ'2 (12) becomes insufficient, and the photoconductive film (
12) Cracks and deterioration of film quality sometimes occurred. It is also conceivable to have several contact holes (10) in places other than the cross-hatched area. In this case, the steep step at the bottom of the contact hole (10) will be reduced, but the depth of the contact hole (10) will increase. As a result, the contact 1-hole (10) portion of the second electrode (11) becomes deeper, resulting in the same effect as described in [1].
本発明はこのような状況に鑑みてなされたもので、光通
ｆｆｉ膜を形成する際の下地の凹凸段差を少なくするこ
とのｉＪ能な固体撮像装置の提供を目的とする。The present invention has been made in view of the above situation, and an object of the present invention is to provide a solid-state imaging device that is capable of reducing uneven steps on the base when forming a light-transmitting FFI film.
即ち本発明は、光導電膜が第１．第２及び第３導体電極
によって電荷蓄積部と′電気的に接続され。That is, in the present invention, the photoconductive film is the first. It is electrically connected to the charge storage section by the second and third conductor electrodes.
第１．第２導体電極間及び第２．第３導体を極間にはそ
れぞれ第１及び第２平滑化層が介在していることを特徴
とする固体撮像装置である。1st. between the second conductor electrodes and between the second conductor electrodes; The solid-state imaging device is characterized in that first and second smoothing layers are interposed between the third conductors, respectively.
即ち、電荷蓄積部と接続される第１導体′＃、極と第２
導体＠極間の接続の際に必然的に生しる第２導体ｖ！ｉ
極の深い凹部を、第２平滑化層によって・Ｖ滑化し、こ
の第２平滑化層−ヒに第２導体電極上接続される第３導
体電極を形成し、光導電膜が形成される際の下地となる
面を１Ｌ滑化したものである。That is, the first conductor '#, which is connected to the charge storage part, and the second
A second conductor v that inevitably occurs when connecting between conductors @ poles! i
The deep concave portion of the pole is smoothed by a second smoothing layer, and a third conductive electrode connected to the second conductive electrode is formed on this second smoothing layer, and when a photoconductive film is formed. The underlying surface is smoothed by 1L.
以下本発明の詳細を図面を参照して説明する。 The details of the present invention will be explained below with reference to the drawings.
第１図は本発明の一実施例を示す図である。これからこ
の実施例を製造工程に従って説明する。FIG. 1 is a diagram showing an embodiment of the present invention. This embodiment will now be described according to the manufacturing process.
まず半導体基板（２０）例えばＰ型シリコン基板の一面
には、Ｐｎ接合からなる電荷蓄積ダイオード（２１）と
、ｎ＋型の埋め込みチャネルＣＣＤからなる垂直ＣＣＤ
（２２）とが隣接して形成され、更にこの一体となっ
たものがチャネルストップ（２３）により互いに分離さ
れている。そして転送ｆｆｉ＋４（２４）、 （２５）
を絶縁するための絶縁膜（２６）が、電荷？９積ダイオ
ード（２１）のｎ＋型領域ヒの一部が露出するように転
送電極（２４）、 （２５）とともに形成されている。First, on one side of a semiconductor substrate (20), for example, a P-type silicon substrate, a charge storage diode (21) consisting of a Pn junction and a vertical CCD consisting of an n+ type buried channel CCD are installed.
(22) are formed adjacent to each other, and this integrated structure is further separated from each other by a channel stop (23). and transfer ffi+4 (24), (25)
The insulating film (26) for insulating the electric charge? It is formed together with the transfer electrodes (24) and (25) so that a part of the n+ type region H of the 9-product diode (21) is exposed.
こうして半導体基板（２０）には、電荷？Ａ積部や走査
部が形成される。なお転送電極（２４）、 （２５）に
は外部から所定のパルスが印加されるようになっていて
、電荷蓄積ダイオード（２１）内の電荷を垂直ＣＣ１，
） （２２）に移した後、順次一方向に転送できる。そ
して半導体基板（２０）上に一部が屯荷谷積ダイオード
（２１）のｎ十型領域に接触するように、例えばＡＱ−
８ｉからなる第１電極（２７）がｔＬいに一両累ごとに
分離して形成されている。次に第１ ｆＬ ｔ４１！（
２７） ）、に例えば低粘度のポリイミドからなる第１
絶縁層（２ｆＳ）を形成して半導体基板（２０）を平滑
化した後、ポリイミドの固化及び脱ガスを行なう。そし
て第１絶縁層（２８）内の所定の位置にコンタクトホー
ル（２９）を設け、第１絶繍層（２８）及びコンタクト
ホール（２９）上に、例えば１−５Ｌからなる第２電極
（３０）が所定の間隔をおいて互いに一画素ごとに分離
して形成されＣいる。なお第２電ｔｉ（３０）は、コン
タクトホール（２９）を介して第１電極（２７）と電気
的に接続されている。次に第２電極（３０）の頂部より
約１５００人の高さに、例えば低粘度のポリイミドから
なる第２絶縁層（３１）を形成して半導体基板（２０）
を平滑化した後、ポリイミドの固化及び脱ガスを行なう
。そして第２絶縁層（３１）内の所定の位置にコンタク
トホール（３２）を設け、第２絶縁層（３１）及びコン
タク１−ホール（３２）上に、例えば厚さ約５００人の
ＡＱ−５ｉからなる第３電極（３３）が第２電極（３０
）と対応するように所定の間隔をおいて形成されている
。なお第３電極（３３）は、コンタクトホール（３２）
を介して第２電極（３０）と電気的に接続されている。In this way, the semiconductor substrate (20) has an electric charge? An A stacking section and a scanning section are formed. Note that a predetermined pulse is applied from the outside to the transfer electrodes (24) and (25), and the charge in the charge storage diode (21) is transferred to the vertical CC1,
) After transferring to (22), it can be sequentially transferred in one direction. For example, the AQ-
A first electrode (27) consisting of 8i is formed separately for each car. Next, 1st fL t41! (
27) ), for example, a first material made of low viscosity polyimide.
After forming an insulating layer (2fS) and smoothing the semiconductor substrate (20), the polyimide is solidified and degassed. A contact hole (29) is provided at a predetermined position in the first insulating layer (28), and a second electrode (30 ) are formed separated from each other by one pixel at a predetermined interval. Note that the second electrode ti (30) is electrically connected to the first electrode (27) via a contact hole (29). Next, a second insulating layer (31) made of, for example, low-viscosity polyimide is formed at a height of approximately 1500 mm from the top of the second electrode (30), and the semiconductor substrate (20) is
After smoothing, the polyimide is solidified and degassed. Then, a contact hole (32) is provided at a predetermined position in the second insulating layer (31), and a contact hole (32) is formed on the second insulating layer (31) and the contact hole (32) to a thickness of about 500, for example. The third electrode (33) consisting of the second electrode (30
) are formed at predetermined intervals to correspond to. Note that the third electrode (33) is a contact hole (32)
It is electrically connected to the second electrode (30) via.
そして第３電極（３３）上には光導電膜（３４）として
、ｉ型の水素化アモルファスシリコン膜（３４１）とＰ
型の水素化アモルファスシリコンカーバイド１ｌｉ（３
４２）を順次、グロー放電分解法によりそれぞれ約３戸
、約２００人の厚さに形成されている。更に光導電膜（
３４）ｌ：には、マグネトロンスパッタ法により例えば
ＩＴＯからなる透明電極（３５）が形成されている。And on the third electrode (33), as a photoconductive film (34), an i-type hydrogenated amorphous silicon film (341) and a P
Type hydrogenated amorphous silicon carbide 1li (3
42) are sequentially formed to a thickness of approximately 3 units and approximately 200 units each by glow discharge decomposition method. Furthermore, a photoconductive film (
34) A transparent electrode (35) made of ITO, for example, is formed by magnetron sputtering.
第２図はこの実施例における第２及び第３電極（３０）
、 （３３）やコンタクトホール（２９）、 （３２）
等の位置関係を透明電極（３５）側からみたときの概略
平面図である。同図において、第１２ｔｔＶｆｉ、（２
７）の終端は従来と同様に、転送ｒｖ！、極（２４）、
（２５）が！バなって最も高くなっているクロスハツ
チングで示した部分に位置しく図示は省１１１８） 、
この部分にコンタクトホール（２９）が設けられ°Ｃい
る。またコンタクトホール（３２）は、第１電極（２７
）が電荷蓄積ダイオード（２１）に接触する部分（４０
）とコンタクトホール（３２ンとの間に位置するように
設けられている。更に第２及び第３電極（３０）、 （
３３）はほぼ同様の形状であり、透明電極（３５）側か
らみたときに第２電極（３０）は対応する第３１１！極
（３３） ’こ完全に屯なっている。Figure 2 shows the second and third electrodes (30) in this embodiment.
, (33) and contact holes (29), (32)
FIG. 4 is a schematic plan view of the positional relationship between the transparent electrodes (35) and the like when viewed from the transparent electrode (35) side. In the same figure, the 12th ttVfi, (2
7) The terminal of transfer rv! is the same as before. , pole (24),
(25) is! It is located at the highest point in the crosshatching area (not shown (1118)),
A contact hole (29) is provided in this portion. Further, the contact hole (32) is connected to the first electrode (27).
) contacts the charge storage diode (21) (40
) and the contact hole (32).Furthermore, second and third electrodes (30), (
33) have almost the same shape, and when viewed from the transparent electrode (35) side, the second electrode (30) has the corresponding 311! Polar (33) 'This is completely oblivious.
この実施例では、従来と同様にコンタクトホール（２９
）の底は急峻な段差にはなるが、これは第１絶縁層（２
８）による平滑化される。一方、コンタクトホール（３
２）の底は第２１！極（３０）上でほぼＬｐ面であり、
しかも第２絶ａＭ（３１）はコンタクトホール（３２）
を覆う程度の厚さで充分なので、光導電膜（３４）を形
成する際の下地の平滑性はより優れたものになる。この
結果、従来のｆ５３図に示したような固体撮像装置では
、光導電体のバイアス電界が５ｘｌＯ’Ｖ／１以下の低
電界でも既に画像に白きずの発生が認められるのに対し
て、この実施例では、バイアス電界が５ＸｌＯ’Ｖ／■
の高′准界になっても画像に白きずの発生が全く認めら
れなかった。In this embodiment, a contact hole (29
) will be a steep step, but this is because the first insulating layer (2
8). On the other hand, the contact hole (3
The bottom of 2) is the 21st! It is almost an Lp plane on the pole (30),
Moreover, the second aM (31) is a contact hole (32)
Since the thickness is sufficient to cover the photoconductive film (34), the smoothness of the base layer upon forming the photoconductive film (34) will be even better. As a result, in the conventional solid-state imaging device shown in the f53 diagram, white flaws are already observed in the image even when the bias electric field of the photoconductor is as low as 5xlO'V/1 or less. In the example, the bias electric field is 5XlO'V/■
No white flaws were observed in the image even at a high quasi-boundary of .
また第２及び第３電極（３０）、 （３３）の形状とし
ては、第３電極（３３）が対応しない例えば隣りの画素
系列を構成する第２′ＫＬ極（３０）ど第２絶縁層（３
１）を介して重複しないことが望ましい。なぜなら第２
絶縁層（３１）は厚さが薄くてピンホールができ、これ
により別の画素系列を構成する第２及び第３′６１極（
３０）、 （３３）が導通してしまう可能性が高いから
である。また第１電極（２７）に関しては、第１絶縁層
（２８）が電荷蓄積ダイオード（２１）の露出する四部
を少なくとも埋める程度の膜）ｌ＾で充分に厚いため。Furthermore, the shape of the second and third electrodes (30) and (33) is such that, for example, the second insulating layer ( 3
It is desirable that there is no duplication via 1). Because the second
The insulating layer (31) is thin and has a pinhole, which allows the second and third 61st poles (
30) and (33) are likely to become conductive. Regarding the first electrode (27), the first insulating layer (28) is thick enough to fill at least the four exposed parts of the charge storage diode (21).
ピンホールの生成する心配がほとんどなく、前述の理由
に基づく形状の制限はない。There is almost no concern that pinholes will be generated, and there are no restrictions on the shape based on the above-mentioned reasons.
なお光導ｆｆ１ｌｉ（３４）としてアモルファスシリコ
ンの例を述べたが、これに限らず、撮像管用の光電変換
材料として用いられている５ｂ２Ｓ２＋ ５ｓ−Ａｓ−
Ｔｅ。Although amorphous silicon has been described as an example of the light guide ff1li (34), it is not limited to this.
Te.
ＣｄＳｅ及びＣｄＺｎＴｓ等も使用できることは明らか
であり、 １．ｎｓｂ、 Ｐｂ５ｎＴＣ及びＣｄ １１
Ｋ ＩＩ ｅ等の赤外用光゛雀材料も使用できる。更
に走査部としてもインターライン転送形ＣＣＤの例を示
したが、これに限定されるものではなく、フレーム転送
形ＣＣＤ、Ｍ、Ｏ３形ＣＨＤや［３Ｂ Ｄ或いはこｔＬ
らの組合せでもよい。It is clear that CdSe and CdZnTs etc. can also be used; 1. nsb, Pb5nTC and Cd 11
Infrared optical materials such as K II e can also be used. Furthermore, although an example of an interline transfer type CCD has been shown as a scanning unit, it is not limited to this, and may include a frame transfer type CCD, M, O3 type CHD, [3B D or KotL].
A combination of these may also be used.
以」二説明したように本発明の固体撮像装置は、１画素
系列を１４Ｌ滑化層が介在された２３個の４体電極で構
成する構造であって、光４π工膜を精籾させる際の下地
の平゛滑性が改存されるため、例えば画像の白きすの発
生防雨に対して極めて有効である。As explained below, the solid-state imaging device of the present invention has a structure in which one pixel series is composed of 23 four-body electrodes with a 14L slipping layer interposed therebetween, and when the optical 4π coating is refined, Since the smoothness of the base is improved, it is extremely effective in preventing rain from forming white spots on images, for example.
第１図は本発明の一実施例を示す断面図、第２図は本発
明の画素電極等の位置関係を入射光側からみたときの一
例を示す概１ａ８ｑｔ面図、第二３図は従来の固体撮像
装置の一例を示す断面図、第４図は従来の固体撮像装置
の転送電極等の位置関係を入射光側からみたときの一例
を示す概略平面図及び概略断面図である。
（２０）・・・・・・半導体基板
（２７）・・・・・・第１電極
（２８）・・・・・・第１絶縁層
■
（３０）・・・・・・第２絶縁層
（３３）・・・・・・第３＠極
（３４）・・・・・・光導電膜
（３５）・・・・・・透明電極
代理人 弁理士 則 近 憲 佑
同 大胡典夫
第 １ 図
ヨ −） Ｎ 冶 η
第 ３ 図
ｔａンFIG. 1 is a cross-sectional view showing an embodiment of the present invention, FIG. 2 is an approximately 1a8qt side view showing an example of the positional relationship of pixel electrodes, etc. of the present invention when viewed from the incident light side, and FIG. 23 is a conventional view. FIG. 4 is a schematic plan view and a schematic cross-sectional view showing an example of the positional relationship of transfer electrodes, etc. of a conventional solid-state imaging device when viewed from the incident light side. (20)...Semiconductor substrate (27)...First electrode (28)...First insulating layer■ (30)...Second insulating layer (33)...3rd@pole (34)...Photoconductive film (35)...Transparent electrode representative Patent attorney Noriyuki Chika Yudo Norio Ogo 1st Figure yo -) N η Figure 3 tan
Claims (2)
この半導体基板上に一部が前記電荷蓄積部に接触するよ
うに互いに分離して形成された第１電極と、この第１電
極上に平滑化する第１絶縁層と、この第１絶縁層上に所
定の間隔をおいて形成され且つ対応する前記第１電極と
接続された第２電極と、この第２電極上を平滑化する第
２絶縁層と、この第２絶縁層上に所定の間隔をおいて形
成され且つ対応する前記第２電極と接続された第３電極
と、この第３電極上に形成された光導電膜と、この光導
電膜上に形成された透明電極とを備えたことを特徴とす
る固体撮像装置。(1) A semiconductor substrate on which a charge storage section and a scanning section are formed;
a first electrode formed on the semiconductor substrate to be separated from each other so that a portion thereof contacts the charge storage section; a first insulating layer smoothed on the first electrode; and a first insulating layer smoothed on the first insulating layer. a second electrode formed at a predetermined interval between the electrodes and connected to the corresponding first electrode; a second insulating layer smoothing the second electrode; and a second insulating layer formed on the second insulating layer at a predetermined interval. a third electrode formed at a distance and connected to the corresponding second electrode, a photoconductive film formed on the third electrode, and a transparent electrode formed on the photoconductive film. A solid-state imaging device characterized by:
層を介して重複していないことを特徴とする特許請求の
範囲第１項記載の固体撮像装置。(2) The solid-state imaging device according to claim 1, wherein the second and third electrodes that do not correspond to each other do not overlap with each other with the second insulating layer interposed therebetween.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60212167A JPS6273661A (en) | 1985-09-27 | 1985-09-27 | Solid-state image pickup device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60212167A JPS6273661A (en) | 1985-09-27 | 1985-09-27 | Solid-state image pickup device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6273661A true JPS6273661A (en) | 1987-04-04 |
Family
ID=16618012
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60212167A Pending JPS6273661A (en) | 1985-09-27 | 1985-09-27 | Solid-state image pickup device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6273661A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6489363A (en) * | 1987-09-29 | 1989-04-03 | Toshiba Corp | Solid state image sensing device |
| JP2007142283A (en) * | 2005-11-21 | 2007-06-07 | Fujifilm Corp | Radiation image detector, and method for manufacturing radiation image detector |
-
1985
- 1985-09-27 JP JP60212167A patent/JPS6273661A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6489363A (en) * | 1987-09-29 | 1989-04-03 | Toshiba Corp | Solid state image sensing device |
| JP2007142283A (en) * | 2005-11-21 | 2007-06-07 | Fujifilm Corp | Radiation image detector, and method for manufacturing radiation image detector |
| JP4762692B2 (en) * | 2005-11-21 | 2011-08-31 | 富士フイルム株式会社 | Radiation image detector and method for manufacturing radiation image detector |
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