JPS6050973A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS6050973A
JPS6050973A JP58157976A JP15797683A JPS6050973A JP S6050973 A JPS6050973 A JP S6050973A JP 58157976 A JP58157976 A JP 58157976A JP 15797683 A JP15797683 A JP 15797683A JP S6050973 A JPS6050973 A JP S6050973A
Authority
JP
Japan
Prior art keywords
layer
layers
hetero junction
semiconductor
gas
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58157976A
Other languages
Japanese (ja)
Other versions
JPH0658970B2 (en
Inventor
Shigeru Kobayashi
茂 小林
Katsumi Yamada
克己 山田
Takeshige Ichimura
市村 剛重
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP58157976A priority Critical patent/JPH0658970B2/en
Publication of JPS6050973A publication Critical patent/JPS6050973A/en
Publication of JPH0658970B2 publication Critical patent/JPH0658970B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02441Group 14 semiconducting materials
    • H01L21/0245Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photovoltaic Devices (AREA)

Abstract

PURPOSE:To obtain a semiconductor device in which irregular lattice is alleviated to activate the features of a hetero junction by interposing a semiconductor layer which has the intermediate of chemical compositions of both semiconductor layers of different band gaps therebetween when forming the hetero junction by the two semiconductor layers. CONSTITUTION:An N type layer 2 made of hydrogenated amorphous Si, an I type layer 3 and a P type window layer 4 for forming hetero junction are laminated on a conductive substrate 1 as a hetero junction semiconductor device made of layers having different band gaps. In this construction, an intermediate layer 5 is interposed additionally between the layers 3 and 4, thereby alleviating the irregular lattice to the layers 3, 4. The layer 5 employs SiH4 of raw material gas used for the layer 3 and gas produced by introducing hydrocarbon gas into the derivative gas in a short time, and formed by glow discharge decomposition. The thickness of the layer 5 at this time is approx. 5-150Angstrom , and the thickness except this reduces the effect instead, and is not accordingly accepted. Thereafter, a transparent conductive film 6 having current collecting electrodes 7 is attached on the layer 4 as normally.

Description

【発明の詳細な説明】 非晶質シリコン(以下a−8iと略記)を主体とす°る
光起電力素子を形成する際、基板上にモノプランおよび
シラン誘導体をシリコン源とし、アクセプターあるいは
ドナーとして働く添加不純物を混合した原料カスを真空
反応槽中でクロー放電分解し、n、iまたはpのa−8
i層を形成し光起電力素子を製造する方法は従来よシ知
られている。
Detailed Description of the Invention When forming a photovoltaic device mainly made of amorphous silicon (hereinafter abbreviated as a-8i), monoplan and silane derivatives are used as silicon sources on a substrate, and acceptor or donor The raw material residue mixed with added impurities that acts as
Methods for forming the i-layer and manufacturing photovoltaic devices are known in the art.

一方、1978年に几CAのパンコツ(Pankov)
らによって炭素添加非晶質シリコン(以下a−8iC:
Hと略記)を該光起電力素子に適用し、a−8iC:H
/a−8iHヘテロ接合を形成し、光起電力素子を構成
する内容の特許(米国特許第4109271号)が発表
されている。
On the other hand, in 1978, Pankov of CA
carbon-doped amorphous silicon (hereinafter referred to as a-8iC) by et al.
a-8iC:H) was applied to the photovoltaic element, and a-8iC:H
A patent (US Pat. No. 4,109,271) has been published in which a photovoltaic device is constructed by forming an /a-8iH heterojunction.

a−8iのn形層、i層、p形層を基板上に第一層、第
二層、第三層として、あるいは逆に構成して素子を製造
する場合には、たとえ不純物をドーピングしても、ドー
ピング層の格子は不純物を添加しないa−8iの格子と
#1は同等である。したが、→てn / I 、 p 
/ l 、 n / p 各接合界面において格子11
羽整合による接合特性の劣化という問題は生ずる’;i
性は非常に少なかった。しかしながら、第一と、崩と第
二層の界面あるいは第三層と第三層の界面・め共有結合
半径はシリコンのそれの約70%にすぎない。
When manufacturing a device by configuring the a-8i n-type layer, i-layer, and p-type layer on the substrate as the first layer, second layer, and third layer, or vice versa, even if doped with impurities, However, the lattice of the doped layer #1 is equivalent to the lattice of a-8i to which no impurity is added. However, →te n / I, p
/l, n/p lattice 11 at each junction interface
The problem of deterioration of bonding properties due to blade alignment occurs';i
There was very little sex. However, the covalent bond radius at the interface between the first and second layers or between the third and third layers is only about 70% of that of silicon.

第 1 表 このため、a S r C: H層の格子はa−8i:
Hの層の格子とは大いに異な凱 a−8iC:H/a−
84=Hの界面には格子の不整合が発生すると考えられ
る。
Table 1 Therefore, the lattice of the a S r C: H layer is a-8i:
Gai a-8iC: H/a- which is very different from the layer lattice of H
It is considered that lattice mismatch occurs at the 84=H interface.

#2表 第2表はホモ接合、ヘテロ接合の光起電力素子について
その特性比較を示した。ヘテロ接合素子畔入射側の層に
シランおよび炭素源となる炭化木次の等量およびそれ以
上の混合ガスをグロー放電分解して生成したa−8iC
:Hを用いたもので、遺H:e i C: H膜中の炭
素量5〜20%である。
Table #2 Table 2 shows a comparison of the characteristics of homojunction and heterojunction photovoltaic elements. A-8iC generated by glow discharge decomposition of a mixed gas of equal or greater amount of silane and carbonized wood serving as a carbon source in the layer on the incident side of the rim of the heterojunction element.
:H is used, and the amount of carbon in the film is 5 to 20%.

a−=S+C:H膜は、その光透過性がa−si:)l
より’<′高いために光電流発生領域である真性a−8
i:H層に到達する光量が大きくなるので、短絡光電流
(J s c )についてはへテロ接合素子より増加し
ている。しかしながら開放電圧(Voc) 、形状因子
(FF)、光電変換効率(η)は7〜15チ低下してい
る。これはa−8iC:H/a−8i:Hヘテロ接合界
面に前述のような格子の不整合が生じて歪を発生させる
ためと考えられる。接合界面に格子不整合による歪が存
在すると、界面付近の局在準位密度が増大し、光起電力
素子のリーク電流、直列抵抗成分が大きくなるため、V
oc、FFを低下させるものである。光透過性の優れた
a−8iC:H層を光起電力素子の入射光側に位置させ
、光起電力素子の光電変換効率を有効に向上させるため
には、このヘテロ接合面に発生する格子不整合を緩和す
る必要性がある。
The a-=S+C:H film has a light transmittance of a-si:)l
Intrinsic a-8, which is the photocurrent generation region because it is higher than '<'
Since the amount of light reaching the i:H layer increases, the short-circuit photocurrent (J sc ) is increased compared to the heterojunction element. However, the open circuit voltage (Voc), form factor (FF), and photoelectric conversion efficiency (η) are reduced by 7 to 15 inches. This is considered to be because the aforementioned lattice mismatch occurs at the a-8iC:H/a-8i:H heterojunction interface, causing strain. When strain due to lattice mismatch exists at the junction interface, the localized level density near the interface increases, and the leakage current and series resistance component of the photovoltaic element increase.
It lowers oc and FF. In order to effectively improve the photoelectric conversion efficiency of the photovoltaic device by positioning the a-8iC:H layer with excellent light transparency on the incident light side of the photovoltaic device, it is necessary to There is a need to alleviate inconsistencies.

〔発明の目的〕[Purpose of the invention]

本発明は、上述の欠点を除去し、ヘテロ接合面#!Af
ts生する格子不整合を緩和してヘテロ接合の特良に生
かした半導体装置を提供することを目的と≠[る。
The present invention eliminates the above-mentioned drawbacks and eliminates the heterojunction surface #! Af
The purpose of this invention is to provide a semiconductor device that takes advantage of the characteristics of a heterojunction by alleviating the lattice mismatch that occurs.

〔発明の要点〕[Key points of the invention]

本発明はへテロ接合を形成する二種類の半導体の二つの
層の間にその化学的組成が両層の半導体の化学的組成の
中間にある半導体の層が介在することによって格子不整
合を緩和するものである。
The present invention alleviates lattice mismatch by interposing a layer of semiconductor whose chemical composition is intermediate between the chemical compositions of the semiconductors of both layers between two layers of two types of semiconductors forming a heterojunction. It is something to do.

〔発明の実施例〕[Embodiments of the invention]

第1図、第4図は本発明の実施例の光起電力素子の構造
を示し、第1図においては導電性基板1の上にa−si
:)(の0層2、a−8i:Hの1層3を積層し、その
上にヘテロ接合を形成するp形のa−8iC:Hの窓層
4を積層する前に、i層の原料ガスであるモノシランお
よびその誘導体ガス中にa−8iC:Hの炭素源となる
炭化水素ガスを短時間導入し、グロー放電分解すること
によJa−8’iC:Hとa−8i:Hの中間層5が形
成されている。さらに窓層4の上に透明導電膜6および
金属集電電極7が設けられる。この光起電力の素子は、
中間層5の形成の際の炭化水素ガスの導入時間および添
加量によシ左右され、中間層5の膜厚が5〜150Aに
なる時間だけ導入した場合に、第3図すしたように中間
層を設けない第2図に示したjmijk構造の素子にく
らべると特性の向上が認めら、和Jrv 0ガスノ組成
についてはCH,/ S i H,= 0.1〜゛2.
4の間で効果が認められた。ここに示した時間。
1 and 4 show the structure of a photovoltaic device according to an embodiment of the present invention. In FIG. 1, an a-si
:) (0 layer 2, a-8i:H 1 layer 3 is laminated, and before laminating the p-type a-8iC:H window layer 4 that forms a heterojunction on top of that, the i-layer Ja-8'iC:H and a-8i:H are produced by introducing a hydrocarbon gas, which serves as a carbon source for a-8iC:H, into the raw material gas monosilane and its derivative gas for a short time and decomposing it by glow discharge. An intermediate layer 5 is formed. Furthermore, a transparent conductive film 6 and a metal current collecting electrode 7 are provided on the window layer 4. This photovoltaic element includes the following:
Depending on the introduction time and amount of hydrocarbon gas added during the formation of the intermediate layer 5, if the hydrocarbon gas is introduced for a period of time such that the film thickness of the intermediate layer 5 is 5 to 150A, the intermediate layer 5 is Compared to the element with the jmijk structure shown in FIG. 2, which does not have any layers, the characteristics are improved, and for the sum Jrv 0 gas composition, CH, / S i H, = 0.1 to 2.
The effect was observed between 4 and 4. The times shown here.

、導入量が多すぎるとヘテロ接合界面に高抵抗層を作る
ことにな、D、’l’!性は逆に低下し、短かいあるい
゛は導入量が少なすぎるときには、この中間層5が格子
不整合を緩和するに充分な層となり得えず、特性の向上
は認められなかった。また、1層3を少量の炭化水素を
導入しつつ形成すると、1層3の光伝導度が低下するた
めに変換効率の低下をもたらすのみであった。中間層を
設けた光起電力素子とそうでない素子との比較を第3表
に示したが、中間層5を形成してやることによって明ら
かに各特性因子(Voc、Jsc、FF)に向上が認め
られ、格子不整合を充分に緩和し素子の特性を大きく改
善することが可能となった。
, if too much is introduced, a high resistance layer will be created at the heterojunction interface. D, 'l'! On the contrary, the properties deteriorated, and when the length was too short or the amount introduced was too small, the intermediate layer 5 could not become a layer sufficient to alleviate the lattice mismatch, and no improvement in properties was observed. Furthermore, when the first layer 3 is formed while introducing a small amount of hydrocarbon, the photoconductivity of the first layer 3 is reduced, which only results in a reduction in the conversion efficiency. Table 3 shows a comparison between a photovoltaic device with an intermediate layer and a device without it, and it is clear that forming the intermediate layer 5 clearly improves each characteristic factor (Voc, Jsc, FF). , it has become possible to sufficiently alleviate lattice mismatch and greatly improve device characteristics.

第 3 表 この中間層による改善効果は、第4図に示すよjにガラ
ス板などの絶縁性透明基板8の上に透明導電膜6、a−
8iC:Hの9層4、a−8i:Hのlin層3a−8
i : HO) n層2、金属電極9を積層する場合に
も9層4とn層3の間に少量の炭化水素を導入して中間
層5を形成した場合、第5図に示した中間層のない従来
の構造の素子にくらべて同様に特性の向上を達成し得た
。また窓層にn形のa−8iC:H膜を用いたときも同
様の中間層の効果が認められた。
Table 3 The improvement effect of this intermediate layer is as shown in FIG. 4, when a transparent conductive film 6, a-
8iC:H 9 layer 4, a-8i:H lin layer 3a-8
i: HO) Even when laminating the n-layer 2 and the metal electrode 9, if a small amount of hydrocarbon is introduced between the n-layer 4 and the n-layer 3 to form the intermediate layer 5, the intermediate layer shown in FIG. Similar improvements in properties were achieved compared to devices with conventional structures without layers. A similar effect of the intermediate layer was also observed when an n-type a-8iC:H film was used as the window layer.

さらに、a−8iC:H/a−8i :H(7)へテロ
接合のみならず、原料ガス中にNH3ガスあるいはN2
ガスを加えて形成する窒素添加a−8iとa−8i:H
のへテロ接合においても、窒素の共有結合半径が第1表
に示したように炭素に近いため同様の格子不整合の問題
があり、これがN)(3カスあるいはN2ガスの少量導
入による中間層を設け、接合界面の格子不整合を緩和す
ることで接合特性を低下させることなく、ヘテロ接合を
形成できることを見い出した。
Furthermore, not only a-8iC:H/a-8i:H(7) heterojunction, but also NH3 gas or N2 gas in the raw material gas.
Nitrogen addition a-8i and a-8i:H formed by adding gas
In the heterojunction of It was discovered that a heterojunction can be formed without deteriorating the bonding properties by providing a lattice mismatch at the bonding interface.

〔発明の効果〕〔Effect of the invention〕

本発明は半導体薄膜の二つの層間に形成される・不テロ
接合の格子不整合を緩和するために化学的4(1成が両
層の中間にある層を介在せしめるもので、)仁れにより
格子不整合のために低下する特性が回復し、特性良好な
ヘテロ接合半導体装置を形成で・き、窓層に光透過性の
よいa−8iC:n層を肩する光起電力素子の特性向上
に極めて有効に適用できる。
The present invention is based on chemical 4 (a layer in which the first layer is located between the two layers) in order to alleviate the lattice mismatch of the interojunction formed between two layers of a semiconductor thin film. Characteristics deteriorated due to lattice mismatch are recovered, a heterojunction semiconductor device with good characteristics can be formed, and the characteristics of a photovoltaic element with a window layer supporting an a-8iC:n layer with good optical transparency are improved. can be applied very effectively to

【図面の簡単な説明】[Brief explanation of the drawing]

琲;1図は本発明の一実施例の断面図、第2図はその改
善前の従来例の断面図、第3図は光電変換効率と中間層
膜厚の関係線図、第4図は本発明の別の実施例の断面図
、第5図はその改善前の従来例の断面図である。 2−・・a−8i :H* n層、3・・・a−8i:
H111層、4・・・a−8iC:Hφp層、5・・・
中間層。 竹許出、原亘太 川 1)ネ畿 部
Figure 1 is a sectional view of an embodiment of the present invention, Figure 2 is a sectional view of a conventional example before its improvement, Figure 3 is a relationship diagram between photoelectric conversion efficiency and intermediate layer film thickness, and Figure 4 is a diagram showing the relationship between photoelectric conversion efficiency and intermediate layer film thickness. FIG. 5 is a cross-sectional view of another embodiment of the present invention, and FIG. 5 is a cross-sectional view of the conventional example before its improvement. 2-...a-8i: H* n layer, 3...a-8i:
H111 layer, 4...a-8iC:Hφp layer, 5...
middle class. Takeuchi, Hara Kotakawa 1) Nekibe

Claims (1)

【特許請求の範囲】[Claims] 1)バンドギャップの異なる二つの半導体の層により形
成されるヘテロ接合を有するものにおいて、両生導体の
層の間にその化学的組成が両層の半導体の化学的組成の
中間にある半導体の層が介在す
1) In a device having a heterojunction formed by two semiconductor layers with different bandgaps, a semiconductor layer whose chemical composition is intermediate between the chemical compositions of the semiconductors in both layers is placed between the amphibodiconductor layers. intervene
JP58157976A 1983-08-31 1983-08-31 Semiconductor device Expired - Lifetime JPH0658970B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58157976A JPH0658970B2 (en) 1983-08-31 1983-08-31 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58157976A JPH0658970B2 (en) 1983-08-31 1983-08-31 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS6050973A true JPS6050973A (en) 1985-03-22
JPH0658970B2 JPH0658970B2 (en) 1994-08-03

Family

ID=15661534

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58157976A Expired - Lifetime JPH0658970B2 (en) 1983-08-31 1983-08-31 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH0658970B2 (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6113673A (en) * 1984-06-25 1986-01-21 エナージー・コンバーシヨン・デバイセス・インコーポレーテツド Stable photovoltaic device and method of producing same
JPS6233479A (en) * 1985-08-07 1987-02-13 Agency Of Ind Science & Technol Solar cell
JPS6260271A (en) * 1985-09-10 1987-03-16 Sanyo Electric Co Ltd Photovoltaic device
JPS62115785A (en) * 1985-11-14 1987-05-27 Kanegafuchi Chem Ind Co Ltd Semiconductor device
JPH01145875A (en) * 1987-12-02 1989-06-07 Hitachi Ltd Amorphous si solar battery
JPH0225078A (en) * 1988-07-13 1990-01-26 Sanyo Electric Co Ltd Photovoltaic device and manufacture thereof
JPH05312081A (en) * 1991-07-25 1993-11-22 Ngk Spark Plug Co Ltd Combustion controller of gasoline engine
JP2004335734A (en) * 2003-05-07 2004-11-25 National Institute Of Advanced Industrial & Technology Thin film solar cell
JP2004335733A (en) * 2003-05-07 2004-11-25 National Institute Of Advanced Industrial & Technology Thin film solar cell

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5779672A (en) * 1980-09-09 1982-05-18 Energy Conversion Devices Inc Photoresponsive amorphous alloy and method of producing same

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5779672A (en) * 1980-09-09 1982-05-18 Energy Conversion Devices Inc Photoresponsive amorphous alloy and method of producing same

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6113673A (en) * 1984-06-25 1986-01-21 エナージー・コンバーシヨン・デバイセス・インコーポレーテツド Stable photovoltaic device and method of producing same
JPS6233479A (en) * 1985-08-07 1987-02-13 Agency Of Ind Science & Technol Solar cell
JPS6260271A (en) * 1985-09-10 1987-03-16 Sanyo Electric Co Ltd Photovoltaic device
JPS62115785A (en) * 1985-11-14 1987-05-27 Kanegafuchi Chem Ind Co Ltd Semiconductor device
JPH01145875A (en) * 1987-12-02 1989-06-07 Hitachi Ltd Amorphous si solar battery
JPH0571195B2 (en) * 1987-12-02 1993-10-06 Hitachi Ltd
JPH0225078A (en) * 1988-07-13 1990-01-26 Sanyo Electric Co Ltd Photovoltaic device and manufacture thereof
JPH05312081A (en) * 1991-07-25 1993-11-22 Ngk Spark Plug Co Ltd Combustion controller of gasoline engine
JP2004335734A (en) * 2003-05-07 2004-11-25 National Institute Of Advanced Industrial & Technology Thin film solar cell
JP2004335733A (en) * 2003-05-07 2004-11-25 National Institute Of Advanced Industrial & Technology Thin film solar cell

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Publication number Publication date
JPH0658970B2 (en) 1994-08-03

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