JPS6050083B2 - power amplifier circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a power amplifier circuit that operates with almost the same power efficiency as in class B operation and does not generate switching distortion.

Conventionally, power amplifier circuits for audio use single-ended push-pull (hereinafter abbreviated as EPP).

) circuits are often used, and in particular, a class B SEPP power amplifier circuit that allows a predetermined idling current to flow but is biased to perform class B operation is employed because of its good power efficiency. However, in a class B SEPP power amplifier circuit, if the idling current is ignored during the positive half-cycle period of the input signal and during the negative half-cycle period of the input signal, the transistors that supply power to the load are different, The transistor is switched according to the switching between the positive half-cycle period and the negative half-cycle period of the input signal, and there is a drawback that switching distortion occurs due to the carrier accumulation effect of the transistor. .

The present invention has been made in view of the above, and eliminates the above-mentioned drawbacks, operates with almost the same power efficiency as class B operation, and operates in accordance with switching between the positive and negative half-cycle periods of the input signal. The purpose of the present invention is to provide a power amplifier circuit that prevents switching of transistors and maintains all transistors in the on state even when a low impedance load is applied until high output power is generated, thereby causing no switching distortion. The present invention will be explained below with reference to Examples.

FIG. 1 is a circuit diagram of one embodiment of the present invention.

A power amplifier circuit according to an embodiment of the present invention has a first circuit in which a resistor 5 is connected in series with a parallel circuit of a tie-out 3 and a resistor 4 between the emitter of the transistor 1 and the collector of the transistor 2. Transistors 1 and 2 are connected in an inverted Darlington connection, and a common connection point C between diode 3 and resistor 5 is connected to load 7 through resistor 6, and similarly between the emitter of transistor 8 and the collector of transistor 9. , a second circuit in which a resistor 12 is connected in series to a parallel circuit of a diode 10 and a resistor 11 is connected, and transistors 8 and 9 are connected in an inverted Darlington manner, and a common connection point B between the diode 10 and the resistor 12 is connected. is connected to the load 7 through the resistor 13 to form a SEPP power amplification circuit.
This SEPP power amplifier circuit further includes a series circuit of a diode 14 and a resistor 15 between the emitter of transistor 1 and the collector point D of transistor 9, and a series circuit of a diode 16 and a resistor 15 between the collector of transistor 2 and the emitter of transistor 8. A series circuit with resistor 17 is connected. In addition +
B and -B are positive and negative power supply terminals, 19 is connected between the bases of transistors 2 and 9, and transistor 2
This is a constant current circuit that flows a bias current to the bases of 9 and 9.

In addition, the bias circuit 18 applies a constant bias voltage between the bases of the transistors 1 and 8, and when an unmanned power signal is issued, a predetermined idling current is caused to flow, transistors 1, 2, 8, and 9 are turned on, and the power amplifier circuit is turned on. It is set to perform class B operation. Note that the constant current circuit 19 is for turning on the transistors 2 and 9 even when the idling current of the transistors 1 and 8 is set to be small. Now, when a negative half-cycle input signal is applied to the power amplifier circuit described above, the collector currents of transistors 8 and 9 increase to supply power to load 7. As the input signal increases, the collector currents of transistors 8 and 9 increase, the emitter current of transistor 8 passes through resistor 13 and diode 10, and the collector current of transistor 9 passes through resistors 13 and 12 to load 7.
flows into. At this time, regardless of the increase in the emitter current of the transistor 8, the base-emitter voltage BO of the transistor 8 and the voltage across the diode 10 hardly change. Therefore, the potential of the point B with respect to the base point A of the transistor 8 does not change. Also, transistor 9
Due to the collector current, the potentials at points C and D centering on point B change to the (+) side and the (-) side, respectively.

Therefore, the voltage between the point C and the emitter point E of the transistor 1 is 0.0 to keep the diode 3 in the on state.
6■ can no longer be maintained, and the diode 3 enters the cut-off state. Even if the input signal increases and the diode 3 goes into the cutoff state, if the diode 14 and the resistor 15 are ignored at this time, the potential at the emitter point E of the transistor 1 will rise and turn the transistor 1 off. , due to the presence of the diode 14 and the resistor 15, the resistor 1
The current flowing through 5 increases and lowers the potential at the emitter of transistor 1, keeping transistor 1 on.

Now, when diode 3 is in the cut-off state, resistors 4, 6, 12, 13 and 15 form a bridge circuit as shown in FIG. Since the value of the current flowing through resistor 6 is extremely small, if resistor 6 is ignored, this bridge circuit will consist of resistors 4, 12, 13 and 15. Now the resistance values of resistors 4, 5, 6, 11, 12, 13, 15 and 17 are R4, R5, R6, Rll, Rl2, Rl39
Rl5 and Rl7, and the resistance value is R49Rl.

Between 9Rl39Rl5, R4lRl2, Rl3R
If set to Rl5, the bridge circuit will be balanced and the resistor 1
No matter how much the currents flowing through 2 and 13 increase, the voltage between points B and E remains the same as the voltage between points B and E at the time of the unmanned power signal and will not change.

Therefore, the transistor 1 is not turned off, but is turned on with the same emitter current flowing through the transistor 1 as the emitter current of the transistor 1 when there is no signal. Further, the above-mentioned R4 and Rl are connected between the resistors 4, 12, 13 and 15. =
Even when there is no relationship between Rl3 and Rl5, the emitter potential of transistor 1 decreases as described above, and transistor 1
However, in this case, the emitter current of the transistor 1 is turned on with a value different from the emitter current of the transistor 1 at the time of the unmanned power signal. Further, transistor 2 is also in an on state. Further, the operation when a positive half-cycle input signal is applied is the same as that described above, and a detailed explanation of the invention will be omitted, but in this case, the load 7
is supplied with power from transistors 1 and 2, and the above equilibrium condition is R5 and Rll: R6 and Rl7. Note that if the idling current of transistors 1 and 8 is set large during the unattended signal, the constant current circuit 19 and the resistor 20 and 21 may be omitted.

In addition, the diodes 14 and 16 are connected to the resistor 1 at the time of unmanned power signal.
5 and 17, and may be omitted.

Furthermore, the connection point of the parallel circuit of diode 3 and resistor 4 is replaced by point C, and only resistor 4 is connected to the collector of transistor 2.
Point B is the connection point of the parallel circuit of diode 10 and resistor 11.
Even if only the resistor 11 is connected to the collector of the transistor 9 instead, the same effect as described above is obtained. As explained above, according to the present invention, regardless of the polarity of the input signal, the magnitude of load impedance, and the magnitude of output power, all transistors do not switch, and switching distortion occurs. Never.

Furthermore, if the idling current of each transistor is ignored, the transistors that supply power to the load are switched depending on the polarity of the input signal, and the power efficiency is almost the same as in the case of class B amplification operation.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of an embodiment of the present invention. FIG. 2 is a diagram for explaining the operation of an embodiment of the present invention. 1
, 2, 8 and 9...transistor, 3, ]0
, 14 and 16...diode, 18...
...Bias circuit.

Claims (1)

[Claims] 1 Connect the collector of the first transistor to the first and second transistors.
A first diode is connected between the emitter of the second transistor and a common connection point of the first and second resistors, and a first diode is connected in parallel to the first diode or a first diode is connected to the load through a series circuit of resistors. the emitter of the second transistor and the first
A third resistor is connected between the collectors of the transistors to form an inverted Darlington connection between the first and second transistors, and the collectors of the third transistors are connected through a series circuit of fourth and fifth resistors. a second diode connected to the load and between the emitter of the fourth transistor and a common connection point of the fourth and fifth resistors;
A sixth resistor is connected in parallel to the second diode or between the emitter of the fourth transistor and the collector of the third transistor to form an inverted Darlington connection between the third and fourth transistors; and a constant bias voltage is applied between the bases of the fourth transistor to form a single-ended push-pull power amplifier circuit, and the emitter of the second transistor is connected to the collector of the third transistor through the seventh resistor. and the emitter of a fourth transistor is connected to the collector of the first transistor through an eighth resistor.