JPS6036104B2 - Semiconductor integrated circuit device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in a separation zone structure using PN assistance in a semiconductor integrated circuit device.

In semiconductor integrated circuit devices, PN junctions are often used to isolate each circuit element independently.

FIG. 1 is a cross-sectional view of an example of a PN separation band structure of a conventional semiconductor integrated circuit device.

A high concentration diffusion region 2 of the same conductivity type as the semiconductor substrate 1 is formed on the P-type semiconductor substrate 1 so as to surround a portion where an element is to be formed.
is formed, and an N-type buried region 3 is formed in a region surrounded by the region 2.
After forming, an N-type semiconductor epitaxial layer 5 is grown on the semiconductor substrate 1, and a layer of the same conductivity type as the semiconductor substrate 1 is grown on the surface of the epitaxial layer 5 from a portion corresponding to the high concentration diffusion region 2. The epitaxial island region 7 is separated from others by diffusing impurities and at the same time forming a diffusion region 6 that reaches a region extending from the high concentration diffusion layer 2 into the epitaxial layer 5 by diffusion.

The upper limit voltage for use of the semiconductor integrated circuit device having the separation band structure is limited by the lowest breakdown voltage between the epitaxial island region 7 and any one of the high concentration diffusion regions 6 of the semiconductor substrate 1. In the above-described structure made by a normal manufacturing method, the breakdown voltage of either the junction between the epitaxial island region 7 and the high concentration diffusion region 2 or the junction between the epitaxial island region 7 and the diffusion region 6, whichever is lower mainly determines the upper limit voltage.

It is known that these voltage drop voltages are determined by the area of the junction where the electric field tends to concentrate near the interface between the semiconductor substrate 1 and the epitaxial layer 5 or near the surface of the epitaxial layer 5. Are known. In order to increase these breakdown voltages, there are methods such as lowering the impurity concentration of the epitaxial layer 5 or lowering the impurity concentration of the high concentration diffusion region 2 and the diffusion region 6. However, even with the current technology, it is difficult to reduce the concentration of the epitaxial layer to less than 5×1 to 1 to 4 atoms/distance and to manufacture the epitaxial layer with good reproducibility. On the other hand, lowering the concentration of the high concentration diffusion region 2 and the diffusion region 6 has the following drawbacks. In other words, if the impurity concentration is lowered, a very long heat treatment will be required in order to penetrate the epitaxial layer, which must be made thicker due to high voltage requirements, and create an isolation region. There is a problem from above. In addition, long-term heat treatment usually destroys the N-type buried region 3, which is buried near the interface between the semiconductor substrate and the epitaxial layer, for the purpose of lowering the collector series resistance of the NPN transistor, which is a component of the semiconductor integrated circuit device. In order to diffuse to the surface of the epitaxial layer, it is necessary to make the epitaxial layer even thicker, which again causes a vicious cycle in which the heat treatment time becomes longer. On the other hand, if the concentration in the diffusion region 6 is lowered and a long time heat treatment is performed, the concentration near the surface will decrease, and therefore the high potential wiring will be connected to the diffusion region 6.
When passing over the diffusion region 6, an inversion layer is formed on the surface of the diffusion region 6, which has the disadvantage that it may not serve as a substantial separation. The present invention provides a separation band structure for a semiconductor integrated circuit device that eliminates the above-mentioned drawbacks and can withstand use at high voltages.

The present invention provides a second conductive type semiconductor layer on a first conductive type semiconductor substrate provided with a first conductive type buried region, and connects the second conductive type semiconductor surface to the first conductive type buried region. In a semiconductor integrated circuit device in which a first conductivity type diffusion region is provided to form a PN junction isolation band, the semiconductor integrated circuit device has a lower impurity concentration than the first conductivity type buried region, and has a larger area and diffusion depth than the buried region. a shallow second buried region of the first conductivity type is provided to cover the first conductivity type buried region, and has a lower impurity concentration than the first conductivity type diffusion region; A second diffusion region of the first conductivity type having a larger area and shallower diffusion depth than the first conductivity type diffusion region is provided to overlap with the first conductivity type diffusion region.

The present invention will be explained by examples.

FIG. 2 shows one of the PN separation bands of the semiconductor integrated circuit device of the present invention.
It is a sectional view of an example.

A first buried region 12 with a high concentration of P-type is formed on a P-type semiconductor substrate 11 so as to surround a portion where an element is to be formed.

Next, the first buried region 12 has an impurity concentration lower than that of the first buried region 12.
A P-type second buried region 14 having a larger area and shallower diffusion depth than the buried region 12 is formed so as to overlap the first buried region 12 . Then, an N-type buried region 13 is formed in a region surrounded by the buried regions 13 and 14. After that, the N-type epitaxial layer 15 is grown.
A P-type high concentration first diffusion region 16 is provided on the surface of the substrate. Next, a P-type second diffusion region 18 having a lower concentration than the diffusion region 16 and having a large area and a shallow diffusion depth is superimposed on the first diffusion region 16 to form an N-type epitaxial layer 15. Form from the surface. In this structure, the epitaxial island region 17 includes the P-type first buried region 12 and the P-type first buried region 12 formed from the surface of the epitaxial layer 15 to reach the P-type first buried region 12. It is separated from the others by a diffusion region 16. On the other hand, epitaxial island area 17,
The breakdown voltage between the epitaxial island region 17 and the P-type second diffusion region 18 is lower than that of the junction between the epitaxial island region 17 and the P-type second diffusion region 18 because there is the P-type second diffusion region 18 with a low concentration near the surface. will be limited by the breakdown voltage of

In this case, due to the low concentration of the P-type second diffusion region 18, a depletion layer is formed closer to the P-type second diffusion region 18 than in the case of the junction between the P-type first diffusion region 16 and the epitaxial island region 5. spreads out sufficiently so that the electric field does not become too strong and therefore the breakdown voltage becomes high. Also, the breakdown voltage between the epitaxial island region 17 and the P-type first buried region 12 is low concentration P-type second buried region 1.
4, the depletion layer between the epitaxial layer 15 and the P-type isolation regions 12 and 14 spreads not only to the epitaxial layer side but also to the P-type second buried region 14 side. The electric field is not strong and is higher than in the conventional case. On the other hand, a low concentration P-type second buried region 14 and a P-type second diffusion region 1
8 eliminates the need to lower the concentration of the P-type first buried region 12 and the P-type first diffusion region 16, which eliminates the disadvantages of long-time heat treatment and reduction of surface concentration, which were problems in the conventional structure. can also be resolved. As described in detail above, according to the present invention, it is possible to obtain a semiconductor integrated circuit device that can be used at high voltage without any difficulties in manufacturing. Although the above embodiment has been described for the case of a P-type semiconductor substrate, it can be implemented in the same manner for the opposite N-type substrate by reversing all the conductivity types.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of an example of a PN separation band structure of a conventional semiconductor integrated circuit device, and FIG. 2 is a sectional view of an embodiment of a PN separation band structure of a semiconductor integrated circuit device of the present invention. 1, 11...P-type semiconductor substrate, 2, 12...
... P-type first buried region, 3, 13... N-type buried region, 14... P-type second buried diffusion, 5, 15
...Epitaxial layer, 6,16...
P-type first diffusion region, 7, 17... epitaxial island region, 18... P-type second diffusion region. Figure 'Figure 2

Claims (1)

[Claims] 1. A second conductive type semiconductor layer is provided on a first conductive type semiconductor substrate provided with a first conductive type buried region, and a first conductive type semiconductor layer is connected to the first conductive type buried region from the surface of the second conductive type semiconductor layer. In a semiconductor integrated circuit device in which a conductivity type diffusion region is provided to form a PN junction separation band, the semiconductor integrated circuit device has a lower impurity concentration than the first conductivity type buried region, and has a larger area and shallower diffusion depth than the buried region. A second buried region of a first conductivity type is provided to overlap with the first conductivity type buried region, and has a lower impurity concentration than the first conductivity type diffusion region, and has a lower impurity concentration than the first conductivity type diffusion region. A semiconductor integrated circuit device, characterized in that a second diffusion region of a first conductivity type having a large area and a shallow diffusion depth is provided to overlap the first conductivity type diffusion region.