JPS6027422B2 - Microcomputer unit testing equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a hardware and software function testing device for a microcomputer unit installed in an electronic device.

In order to test the functions of the hardware and software of the microcomputer unit installed in electronic equipment during manufacturing tests at the factory and during on-site adjustments and maintenance at the delivery destination, it is necessary to control the operation of the microcomputer unit. and display its status,
It is necessary to have a control circuit and operation panel for each electronic device, which has the function of reading and writing the contents of the internal registers and memory of the microcomputer unit, even though they are not used all the time. In addition to being expensive, these control circuits and operation panels must also be tested when testing the electronic device.

The present invention connects a microcomputer unit to an electronic device equipped with it whenever necessary, controls the operation of the microcomputer unit from the outside, displays its status, and writes data to the internal registers and memory of the microcomputer unit. By using a microcomputer unit testing device that can conduct and discuss operations, the above-mentioned drawbacks can be solved, making it possible to make electronic devices more compact and economical. The present invention provides a test device that can efficiently test the hardware and software functions of a microcomputer unit installed in an electronic device.

The basic configuration of the present invention to achieve the above object includes an input/output bus cable that is connected to an electronic device equipped with a microcomputer unit and draws input/output signals of the microcomputer unit into the main body of the test equipment, and an open key. The testing apparatus main body is capable of controlling the operation of the microcomputer unit by operation, and the status of the operation can be discussed by means of a display element, and also capable of writing and reading data into and from the internal registers and memory of the microcomputer unit. Next, embodiments of the present invention will be described with reference to the drawings.

The figure is a block diagram showing one embodiment of the present invention. This embodiment is equipped with a microcomputer unit 3 which is a controlled device, and is connected to the microcomputer unit 3 through input/output lines A and 8, and includes an electronic device 1 having a controlled section 4 to be controlled, and An address match detection circuit 5 that compares the address currently being executed by the computer unit with a preset address, a microcomputer unit control circuit 6 that controls the operating state of the microcomputer unit, and a microcomputer unit control circuit 6 that controls reading and writing of the memory of the microcomputer unit. A direct memory access circuit 7 to perform operations, an interrupt circuit 8 to send an interrupt signal to the microcomputer unit, a forced interrupt circuit 9 to read and write register contents in the microcomputer unit, and a microcomputer unit testing device. Operation unit 10, input/output signal bus cable for
and a microcomputer unit testing device 2 having Y. Next, using this test equipment, after starting the execution of the program in the microcomputer unit from an arbitrary address, interrupting the program, and stopping the execution of the program when the interrupt processing is completed, and checking the memory contents. The operation of this test device will be explained using a series of tests as an example.

First, the program address at the end of the interrupt process is set in the address match detection circuit 5 by operating the Kasumi key on the operation unit 10. Similarly, the direct memory access circuit 7 is activated, and the memory hep, p of the microcomputer unit 3 is activated.
” When the writing of the gram start address data is instructed, the circuit 7 sends a signal to the output signal bus cable Y.
When the microcomputer unit 3 receives this signal, it writes this program start address data into the designated area of the internal memory. After making the above preparations, the forced interrupt circuit 9 is activated by operating the dragon key on the operation unit 10, and the circuit 9 sends a signal to the output signal bus cable Y. When the microcomputer unit 3 receives this signal, it rewrites the value of the program counter, which is one of its internal registers, to a program start address previously set in the memory, and starts executing the program from that address. Next, operate the turtle key on the operation unit 10 to start the interrupt circuit 8, and the circuit 8 will be connected to the output signal bus cable Y.
send a signal to. When the microcomputer unit 3 receives this signal, it interrupts the currently executing program and executes the interrupt processing program. When the address match detection circuit 5 matches the currently running program address information sent from the microcomputer unit 3 through the input signal bus cable 6 and a display signal to the operating section 101. When the microcomputer unit control circuit 6 receives this detection signal, it sends out a control circuit to the output signal bus cable Y and also sends out a display signal to the operating section 10'. When the microcomputer unit 3 receives this control signal, it stops executing the program and sends a response signal to the input signal bus scale X. The operation unit 10 displays the display signals from the circuits 5 and 6 as well as the response signals on a display element. After confirming this display, operate the open key on the operation unit 10 to activate the direct memory access circuit 7 and instruct the microcomputer unit 3 to read the memory contents.The circuit 7 sends a signal to the output signal bus cable Y. Send. When the microcomputer unit 3 receives this signal, the memo IJ
Sends the contents to input signal bus cable X. When the direct memory access circuit 7 receives this memory content, it sends out a display signal to the operating section 10'. The operation unit 10 displays this display signal on a display element. As described above, in the microcomputer unit testing device of the present invention, by connecting the microcomputer unit to the electronic device equipped with it whenever necessary, it is possible to control the operation of the microcomputer unit from outside the electronic device and to check the operating state. It can read, write to internal registers and memory, and conduct discussions, and there is no need for each electronic device to have a control circuit and operation panel with the same functions as this test device, making electronic devices more compact and economical. It is possible to efficiently test the hardware and software functions of microcomputer units installed in electronic devices.

As explained above, the present invention eliminates the function to directly control and operate the microcomputer unit, which was conventionally required for each electronic device, by configuring the test device with the input/output bus cable and the test device main body. This makes it possible to make electronic devices smaller and more economical, and to improve the efficiency of testing. A simple explanatory diagram of the drawing is a functional block diagram of a microcomputer unit testing device showing one embodiment of the present invention.

1...Electronic device equipped with a microcomputer unit, 2...Microcomputer unit testing device, 3...Microcomputer unit mounted on an electronic device, 4...Micro Part of an electronic device controlled by a computer unit, 5.
... Address match detection circuit, 6 ... Microcomputer unit control circuit, 7 ... Direct memory access circuit, 8 ... Interrupt circuit, 9
...Forced interrupt circuit, 10... Operation unit, A.
...Input signal line of microcomputer unit, B...Microphone.

Claims (1)

[Claims] 1. An address match detection circuit that compares the address currently being executed by the microcomputer unit to be tested with a preset address; a microcomputer unit control circuit that controls the operating state of the microcomputer unit; A direct memory access circuit for reading and writing the memory of a computer unit, an interrupt circuit for sending an interrupt signal to the microcomputer unit, a forcing circuit for reading and writing register contents in the microcomputer unit, and a test. A microcomputer unit testing device comprising: an operation section for inputting operation information; and an input/output bus cable for inputting input/output signals of the microcomputer unit.