JPS60257494A - Screen display method - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a screen display method for displaying graphics.
It has been impossible to overlap color screens with each other, but it has generally been impossible to overlap color graphics screens with each other. In order to perform a color graphic display, a video dedicated memory (hereinafter referred to as VRAM) is generally provided for red, green, and blue. The VRAM has a one-to-one correspondence with the addresses on the display screen, and one dot on the screen consists of a combination of red, green, and blue information as shown in FIG.

FIG. 2 is a block diagram of a graphic data output circuit for explaining the prior art, and FIG. 3 is a waveform diagram for explaining the prior art. FIG. 3 fl+ shows a reference clock signal (8). FIG. 3 (2) shows a reference clock signal for displaying a character display or a graphic display.

FIG. 3(3) shows address signals from a central spooling device (not shown). Graphic random aqueous memory (hereinafter referred to as GRAM) 1 to 3 are each an additive color 3
It has data corresponding to the primary colors red, green, and blue. G.R.A.
MI-3 outputs the data shown in FIG. 3 (14) when the address shown in FIG. 3 (3) is input. Shift+/registers 4 to 6 convert parallel data into serial data and output it. This output is shown in Figure 3 (6)
Since the OVRAM shown in FIG. 1 normally only supports one screen of images, when displaying color graphics as described above, only one screen of images is displayed. If red, green, and blue VRAMs are used as one screen, a total of three screens can be displayed as shown in FIG. 4. However, at this time, the color of each screen is fixed and there is a drawback that only one color can be displayed on each screen.

Purpose An object of the present invention is to provide a screen display method that can perform display by making multiple use of display patterns.

Embodiment Conventionally, character and graphic displays have been performed using one character clock cycle as a reference clock. The present invention achieves the display of 9 minutes of graphics on n screens by repeatedly reading out the graphic data n times every character clock cycle. FIGS. 5 and 6 are diagrams showing graphics. When the graphic displays of FIGS. 5 and 6 are superimposed and displayed, a screen as shown in FIG. 7 is obtained.

8 is a block diagram of a screen display device according to an embodiment of the present invention, and FIG. 9 is a waveform diagram showing waveforms of various parts of the screen display device shown in FIG. FIG. 9m shows a reference clock signal. FIG. 9(2) shows a check signal which is a reference for displaying a character display or a graphic display. FIG. 9 (8) shows the Agiles generation circuit AD
shows the address signal from. The address signal shown in FIG. 9(3) is generated at the same wave number that is half the same wave number input to the text random access memory (hereinafter referred to as text RAM) TX.

The data output from the text RAMTX is converted into a character pattern by the character generator CG. The parallel character pattern output from the character generator CG is converted into serial data VC by the shift register SR and output to the display device MCRT. Shift register SR operates in synchronization with the character clock cycle output from clock circuit CK. Graphic random access memory (GR)
11 to 13 (referred to as AM) have data for two screens. GRAM II-13 are read twice at a frequency that is half the frequency of the address signal input to the text RAMTX. Latch same (Raku 14~16, shift register 17~
22 and selection circuit 23 are activated in synchronization with the output from clock circuit CK. Clock circuit CK at this time
The output from is half of the output output to shift register SR. For this reason, the read data is as shown in Figure 9 (4).
), half of the data is divided by 1,000 and read out. The first read data is the latch circuit 1°4,
-16 to shift registers 17-19. The data input during latch circuits 14 to 16 is
This is shown in Figure (6). The outputs from shift registers 17-19 are shown in FIG. 9(6). The second read data is directly input to shift registers 20-22. The outputs from shift registers 20-22 are shown in FIG. 9(7). Shift register 17-22
converts parallel data into serial data, further expands and outputs the EJif data. The data output from shift registers 17 to 19 is
It is input to terminals 1A to 3A of Ilt123. The data output from the shift registers 20 to 22 is sent to the selection circuit 2.
It is input to terminals IB to 3B of 3. The control circuit 24 outputs a switching signal to the terminal S of the selection circuit 23 for connecting the data input to the terminals IA to 3A or the terminals 1B to 3B to the terminals IY to 3Y.
The two types of data stored in I-13 are output to shift registers 17-19 or shift registers 20-22.

Using the selection amount W'J23 and the control circuit 24, the data stored in the shift registers 17-22 can be selectively output to the display device CRT.

By operating the control circuit 24, the terminals IA to 3 of the selection circuit 23
The figure when the data inputted to A is outputted to the terminals IY to 3Y is shown in FIG. 5, for example. Terminal IB~3B
The figure when the data inputted to the terminals IY to 3Y are output is shown in FIG. 6, for example. By operating the control circuit 24, a superimposed display as shown in FIG. 7 can be performed.

In the above-mentioned embodiment, data of GRAMiC2 persimmons was stored, but any number of types of data, including two or more types, may be stored. When storing data of type 0 11'l, the character clock cycle must be set to 1/n.

Effects As described above, according to the present invention, a plurality of graphic screens can be displayed in order to access a plurality of graphic data during a fixed period of a constant synchronized pulse waveform, which serves as a base for synchronizing when displaying a character. can be displayed.

[Brief explanation of drawings]

FIG. 1 is a diagram for explaining the prior art, FIG. 2 is a block diagram of a graphic data output circuit of the prior art, and FIG. 3 is a waveform diagram showing waveforms of each part of the graphic data output circuit shown in FIG. Figure 4 is a diagram for explaining the prior art, @ Figures 5 to 7 are diagrams for explaining the present invention, and Figure 8 is a diagram for explaining the present invention.
The figure is a block diagram of a screen display device according to an embodiment of the present invention, and FIG. 9 is a waveform diagram showing waveforms of various parts of the screen display device shown in FIG. 11-J3... Graphic random access memory, 14-16... Latch circuit, 17-22... Shift register, 23... Selection circuit, 24... Control circuit agent Ben-beater Keiichi Nishinori Figure 5 Figure 6 Figure 7 Figure 8

Claims (1)

[Claims] Access multiple graphic data during a certain period of a pulse waveform with a certain period, which becomes a mature tree to take a cycle in one festival when displaying a character, and select and display the last accessed graphic data. A screen display method characterized by: