SU1499397A1 - Device for displaying information on television indicator screen - Google Patents

Abstract

The invention relates to the field of automation and computer technology and can be used to display information from a computer. The purpose of the invention is to simplify the device. The device contains a block 1 interface, the first 2 and second 6 block and registers, interpolator 3, block 4 write-erase, block 5 RAM, 7 characters generator, register 8, first 9 and second 11 address counters, multiplexer 10, a synchronization unit 12, a television indicator 13 with corresponding links, a command to form character and graphic elements via the conjugation unit 1 and the register unit 2 are sent to the interpolator 3 and the 7 symbol generator, where the unit increments of the X and Y coordinates are formed, which, control of the counter 9 address a, provide the formation in block 5 of the memory of the binary equivalent of the element. The write-erase unit 4 provides for selective recording of individual bits of a word, which makes it possible to organize editing of information on the screen without distorting the image. When displaying an image, readout addresses are generated by a counter 11, from where, via multiplexer 10, they are sent to the address input of memory block 5. 1 il.

Description

31499397

The invention relates to automation and computing and can be used to display information from a computer. ,

The purpose of the invention is to simplify the device.

The drawing shows a functional block diagram of the device.

The device contains a block of 1.sopr, the first block of 2 registers, an interpolator 3, a block 4 of write-erase, a block of 5 memory, a second block of 6 registers, a generator of 7 symbols, a register 8, the first counter 9 of the address-15 15 , multiplexer 10, second count-. address chuck 11, synchronization unit 12, television indicator 13 containing a chrominance unit 14, generator unit 15, indicator unit 16. In addition, the second output 17 of the interface unit 17 is marked, the eleventh output 18 of synchronization unit 12, input 19 / unit 12 synchronization, the output 20 of the first block of registers, the fourth output 21 of the synchronization block 12, the second output --- 22 interpolator 3 ,. the seventh output 23 of the synchronization unit 12, the inputs 24 and 25 of the synchronization unit 12, the eighth

25

written to the one of its two registers, which is currently working on the recording, by a command on one of the buses 36 of block 12. Reading video data from block 6 is carried out in four words by signals on the buses 36 of block 12 which in turn allow the corresponding outputs of the go register of block 6 which is readable. The outputs of the corresponding bits of the registers of block 6 are combined according to the INSTALLING OR scheme.

The four-bit words read from block 6 of registers over bus 38 are received in block 14 of chromaticity, which converts these words into a three-digit modulation code of the rays of the television indicator 13. Block 14 can be programmed so that with image overlays can be displayed According to the natural colors of the overlays of the libra, one of the primary colors prevails, or the overlays in any case will be displayed in the same color (for example, white). . .

From the chrominance block 14, video signals over the tires 39 enter the block 15 you26, the sixth 27 outputs block 12 of the synchronized drivers, in which, by input, the input 28 of the block 12 synchronizes with 37 from the synchronization block 12, the third output 29 of the block 12 syn- synchronization, output 30 of the first counter 9 addresses, information input

35

the second block 6 of registers, address 32 and control 33 inputs of the RAM 5, ninth 34, first 35, tenth 36, twelfth 37 outputs of the synchronization unit 12, output

38 second block 6 registers output

39 of the chroma block 14, the output 40 of the generator unit 15, the fifth output 41 of the synchronization unit 12, the output 42 of the second counter 11 of the address.

The device works as follows.

In block 5, the RAM stores data about each image point that is formed on the screen.

taking into account

sync and dimming signals are also received.

Unit 15 generates signals on output lines 40 with parameters necessary for operation of indicator unit 16.

40

television indicator 13 color and mutual overlaps. :

To ensure a flicker-free image on the screen, periodic data reading is carried out, stored. in block 5 of memory, with frame frequency.

The word from block 5 via tires 31 enters the second block 6 of registers and

The display of block 5 during mapping is from the second counter 11 of the address. Counter 11 is reset with a signal on one of the Tires 35 So time of the Frame damping pulse. The sequential d5 increment of the block addresses, 5 synchronously with the raster scan, is realized by single increments, which are fed to the counter 11 from the synchronization block 12. According to one of figure 35. All the addresses of block 5 are calculated in one frame. The address codes from the output of counter 11 arrive at the address inputs of block 5 through multiplexer 10 for buses 42 and 32, respectively.

Changes to the merge data are implemented as follows.

Information about changes coming from a computer (not shown) from the device input to the interface 1 unit. At least

50

five

written to the one of its two registers that is currently working on the recording, on a command on one of the buses 36 of the block 12. Reading video data from block 6 is carried out four times by words on the signals on the tires 36 of the synchronization block 12, which in turn allow the corresponding outputs of the go register of block 6, which operates on reading. You, the moves of the corresponding bits of the registers of block 6 are combined according to the INSTALLING OR scheme.

The four-bit words read from block 6 of registers over bus 38 are received in block 14 of chromaticity, which converts these words into a three-digit modulation code of the rays of the television indicator 13. Block 14 can be programmed so that with image overlays can be displayed According to the natural colors of the overlays, the libre will dominate one of the primary colors, or the overlays in any Case will be displayed in the same color (for example, white). . .

From block 14 chroma video signals on the tires 39 are received in the block 15 output drivers, in which the tires 37 from the block 12 synchronization

sync and dimming signals are also received.

Unit 15 generates signals on output lines 40 with parameters necessary for operation of indicator unit 16.

0

The display of block 5 during mapping is from the second counter 11 of the address. Counter 11 is reset with a signal on one of the Tires 35 So time of the Frame damping pulse. The sequential 5 increment of the block addresses, 5 synchronously with the raster scan, is realized by single increments, which are fed to the counter 11 from the sync block 12. nizatsii According to one of the actions 35. All the addresses of block 5 are found during one frame. Codes of addresses from the output of the counter 11 arrive at the address inputs of block 5 through the multiplexer 10 for buses 42 and 32, respectively.

Changes to the merge data are implemented as follows.

Information about the changes comes from a computer (not shown) from the input of the device to the interface unit 1. At least

0

One of the two registers of block 2 of registers is free; on the command word received from the computer, the synchronization block 12 on one of the buses 18 generates a command to enable the interface 1 of the response word in the computer. In addition, in synchronization block 12, the code that is contained in the command word and enters the bus 17 is memorized. This code corresponds to the number of information words that will be transmitted from the computer after receiving the response word. These words on tires 17

characters on the team bus 23 from block 12 synchronization.

Upon completion of reading the data, the corresponding register of block 2 is considered free, its state is fixed by block 12.

The operation of the device when making changes is as follows. In the read cycles of block 5, the read and write phases of the signals on buses 33 from block 12 are entered, for which the signal on buses 34 from block 12 is switched by

sequentially input to block 2 is the execution of multiplexer 10 and the addressing of the gistros according to the signals on the buses 21 ,. which are formed by the synchronization unit 12 on the basis of signs arriving from the conjugation unit 1 via one of the tires 19.

After receiving the number of information words specified by the computer, unit 12 again forms a command to reply 20

block 5 from counter 9. Reversible counter 9 is set by values Хц, У ", and subsequent changes in its state occur by signals of unit increments 14 x, td У, which are fed to the counter inputs by bus 28 s 8 register. These increments correspond to bypassing the contours of the images of symbols or graphics; they each step 25 to the input of register 8 on buses 22 from the outputs of the interpolator 3 or the generator of 7 symbols. The traversal of the contours of symbols or graphics and the corresponding change in the addresses of block 5 is completed by signals on buses 24 or 25 from the outputs of the generator 7 symbols or interpolator 3, which arrive in block 12.

A word in one of the bits of which indicates whether there was an error in receiving the message. If the message was received with an error, it is ignored, and the register of block 2, into which the words were entered, is considered free. If the message was received without error, and the introduction of previous changes to the displayed data is completed, the synchronization unit 12 on the buses 21 generates signals for alternately reading the words of the register of the unit 2 into which the information words were written.

From the output of block 2 on tires 20 dan. These are distributed as follows. The bits of the first word, defining the character (recording or erasing) and the color of the changes made, are entered into block 4 by a command on one of the buses of 26 ioT block 12. And the bits of the same word, defining the value X, are entered The first counter of the address 9 is commanded on one of the buses 29 from block 12. The bit of the second data word, which determines the type (symbols or graphics) of the data being changed, is entered into block 12, and the bits of this word corresponding to Y, are entered into the address counter 9 by a command on one of the buses 29 from the synchronization unit 12.

Subsequent words from busbars 20, depending on the type of variable data, are entered into interpolator 3 by commands on buses 41 or generator 7

multiplexer 10 and addressing

block 5 from the counter 9. The up / down counter 9 is set by the values Хц, У ", and the subsequent changes of its state occur according to the signals of unit increments 14 x, td У, which are fed to the counter inputs via the bus, 28 from us register 8. These increments correspond to bypassing the contours of the images of symbols or graphics; they enter the input of register 8 via buses 22 from the outputs of the interpolator 3 or the generator of 7 symbols. The traversal of the contours of symbols or graphics and the corresponding change in the addresses of block 5 is completed by signals on buses 24 or 25 from the generator outputs of 7 symbols or interpolator 3, which are received in block 12.

five

0

Making changes to any point in the image, i.e. at any address of block 5, is implemented as follows. After the reading of block 5 is completed, the multiplexer 10 is switched to display and the word of block 5 is read at the address set in counter 9. The input input signal in block 6 of registers is not generated, and data from the output of block 5 on bi-directional bus 31 is received in block 4. These data correspond to eight points of the image, the changes at the moment are made only in one point, which is selected by block 4 on the matched bits of the address received on buses 30 from counter 9. According to this data block 4 write-erase uet new word unit 5, and which with a eapisyvaet- unit 5 at the same address as the write command on the bus 33 from the block 12. Then the multiplexer 10 is switched so that the block 5 chitaets information in the display cycle.

0

and the flow again follows the change procedure to completion.

The word of register 8, except for the bits of increments 1лх and iuy, contains the bit of the permission for making changes (RVI), which is on one of the tires. 28 enters block 12. If this bit is 1, which corresponds to the prohibition of making changes, then block 12 does not generate read-write signals to make changes to w, check 33 and switch multiplexer 10 on bus 34, although The counting of the counters 9 varies. Thus, the change of addresses in the counter 9 is realized without making changes to the displayed data, which is necessary when closing the character contours or forming parts of a graphic image.

The presence of register 8 makes it possible to implement parallel interpolation or generation of data on symbols with modification procedures and to have ready increments of counter 9 to start reading block 5 in the modification phase.

After the completion of the change procedure, the synchronization unit 12 begins processing the new data, if it has finished entering the registers in block 2.

Thus, the invention provides a simplification of the device by reducing the number of functional blocks necessary for implementing the selective modification of the image fragments and their relative position.

Claims (1)

Invention Formula A device for displaying information on the screen of a television indicator, comprising a interface unit, first and second blocks of registers, an interpolator, a write-erase unit, a memory unit, an oscillator generator, a register, first and second address counters, multiplexer, synchronization unit, the first output of which is connected to the clock input of the second address counter, the output of which is connected to the first information output of the multiplexer, the output of which is connected to the address input of the main memory unit, the control input Wow connected to the second output of the synchronization unit, the third output of which is connected to the clock input of the first 0 five Q five 0 g 0 five the first address counter whose information input, interpolator information inputs, write-erase block and sync block symbol's signal input are connected to the output of the first register block whose recording control input is connected to the fourth output of the synchronization block whose fifth output is connected to the clock input interpolator, the first output of which is connected to the input signal of the sign of the end of the formation of the graphic element of the synchronization unit, the sixth output of which is connected to the control input By a register, the clock input of the symbol generator is connected to the seventh output of the synchronization unit, the eighth output of which is connected to the clock input of the write-erase unit, the control input of the multiplexer is connected to the ninth output of the synchronization unit, the tenth output of which is connected to the recording control input of the second block registers, the information input of which is connected to the information input-output of the RAM unit, the trigger input of the synchronization unit is connected to the first output of the interface unit, the second output D which is connected to the information input of the first block of registers and the input of the command code of the synchronization block, the eleventh output of which is connected to the input of the error signal of the interface block, the information input-output of which is the information input-output of the device, the output of the second block of registers is connected to the video input of the television indicator The synchronous input of which is connected to the twelfth output of the synchronization unit, characterized in that, in order to simplify the device, the output of the first block of registers is connected to the address the input of the symbol generator, the first output of which is connected to the input signal of the sign of the termination of the synchronization unit symbol, the input of the increment codes of coordinates X and U and the control input of the recording of the first address counter are connected to the input of the register whose information input is connected to the second outputs of the interpolator and of the character generator, the output of the first address counter is connected to the second information input multiplexer 1a and to the address input 9149939710 write-erase unit, information-information input-output unit ny input-output of which is connected to the operative memory.