JPS60253232A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS60253232A JPS60253232A JP10919484A JP10919484A JPS60253232A JP S60253232 A JPS60253232 A JP S60253232A JP 10919484 A JP10919484 A JP 10919484A JP 10919484 A JP10919484 A JP 10919484A JP S60253232 A JPS60253232 A JP S60253232A
- Authority
- JP
- Japan
- Prior art keywords
- insulating film
- etching
- photoresist
- semiconductor device
- angle
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 26
- 238000004519 manufacturing process Methods 0.000 title claims description 15
- 238000005530 etching Methods 0.000 claims abstract description 18
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 18
- 239000000758 substrate Substances 0.000 claims abstract description 9
- 238000000034 method Methods 0.000 claims abstract description 8
- 229910052751 metal Inorganic materials 0.000 abstract description 6
- 239000002184 metal Substances 0.000 abstract description 6
- 238000001259 photo etching Methods 0.000 abstract description 3
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 239000012535 impurity Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Weting (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分針〕
本発明は半導体装置の製造方法、特に金属電極の断線を
防止するための絶縁膜の写真蝕刻法に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Minute Hand] The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of photo-etching an insulating film to prevent disconnection of metal electrodes.
従来、半導体装置の製造工程において不純物の選択的拡
散用マスクを形成する技術として写真蝕刻法がある。写
真蝕刻法は半導体基板上の絶縁膜上にフォトレジストを
選択的に残し、このフォトレジストをマスクに前記絶縁
膜を選択的にエツチングするものであるが、絶縁膜のエ
ツジが直角に近い段となり、アルミニウム等の金属電極
の断線等の信頼性上非常に大きな問題を生ずる可能性が
ある。2. Description of the Related Art Conventionally, photolithography has been used as a technique for forming masks for selectively diffusing impurities in the manufacturing process of semiconductor devices. In the photo-etching method, a photoresist is selectively left on an insulating film on a semiconductor substrate, and the insulating film is selectively etched using this photoresist as a mask. , there is a possibility that very serious reliability problems such as disconnection of metal electrodes such as aluminum may occur.
本発明の目的は、かかる従来技術の欠点を解消した、金
属電極の断線の恐れのない信頼性の高い半導体装置を提
供することにある。SUMMARY OF THE INVENTION An object of the present invention is to provide a highly reliable semiconductor device that eliminates the drawbacks of the prior art and is free from the risk of metal electrode disconnection.
本発明によれば、半導体基板上の絶縁膜を耐エツチング
マスクを用いて厚さの一部分除去する工程と、その後耐
エツチングマスクを除去し、絶縁膜を全体的にエツチン
グして選択的に半導体基板を露出せしめる工程とを含む
半導体装置の製造方法を得る。According to the present invention, there is a step of removing a portion of the thickness of an insulating film on a semiconductor substrate using an etching-resistant mask, and then removing the etching-resistant mask and etching the entire insulating film to selectively remove the insulating film from the semiconductor substrate. A method for manufacturing a semiconductor device is obtained, including a step of exposing the semiconductor device.
次ｅ【本発明を図面を用いてより詳細に説明する。 Next, the present invention will be explained in more detail with reference to the drawings.
第１図に従来の半導体装置の製造方法の一例の断面図を
示す。半導体基板１上に酸化膜等の絶縁膜２を形成しく
第１図（ａ） ’） 、次に、フォトレジスト３を全面
に塗布した後、写真蝕刻法により選択的に除去しく第１
図中））、シかる後エツチング液を用いてフォトレジス
ト３で覆われていない部分の絶縁膜２を全て除去しく第
１図（Ｃ））、その後フォトレジスト３を除去（第１図
（ｄ））するが、この際絶縁膜２の端部４ａの角度θ１
は直角に近くなるため、アルにラム等の金属電極をその
後形成する場合には絶縁膜２の端部４ａで断線を生じや
すくなり、信頼性上太き表問題点を有することになる。FIG. 1 shows a cross-sectional view of an example of a conventional method for manufacturing a semiconductor device. An insulating film 2 such as an oxide film is formed on the semiconductor substrate 1 (FIG. 1(a)'). Next, a photoresist 3 is applied to the entire surface, and then selectively removed by photolithography.
(in the figure)), then remove all parts of the insulating film 2 that are not covered with the photoresist 3 using an etching solution (Figure 1 (C)), and then remove the photoresist 3 (Figure 1 (d)). )) However, at this time, the angle θ1 of the end portion 4a of the insulating film 2
is close to a right angle, so when a metal electrode such as a ram is subsequently formed on the aluminum, disconnection is likely to occur at the end 4a of the insulating film 2, resulting in a problem with reliability.
第２図（ａ）〜Φ）は本発明の一実施例による半導体装
置の製造方法を示す断面図である。本発明によれば、フ
ォトレジスト３をマスクとしてのエツチングを途中で止
めて、（第２図（Ｃ））、フォトレジスト３を除去した
後（第２図（ｄ） ） 、再度エツチング液中でエツチ
ングする（第２図（ｅ））ものである。FIGS. 2(a) to Φ) are cross-sectional views showing a method of manufacturing a semiconductor device according to an embodiment of the present invention. According to the present invention, etching using the photoresist 3 as a mask is stopped midway (FIG. 2(C)), and after the photoresist 3 is removed (FIG. 2(d)), the etching is performed again in the etching solution. It is etched (Fig. 2(e)).
このように本発明による絶縁膜２のエツチング方法によ
れば、フォトレジスト３を除去し、絶縁膜２の全面をエ
ツチングする際に絶縁膜２の端部４ｂは垂直方向と水平
方向から同時にエツチングされるため角がとれてなだら
かな段となり、端部４ｂ部分の角度θ２は、前記従来の
製造方法による端部４ａの角度θ１よりけるかに大きな
角度となるため金属電極の断線を生じないという優れた
特徴を有する。、
〔発明の効果〕
このように、本発明による半導体装置の製造方法によっ
て絶縁膜のエツチングを２段階に分けることにより、非
常に信頼性の優れた半導体装置を提供することができる
。As described above, according to the method of etching the insulating film 2 according to the present invention, when the photoresist 3 is removed and the entire surface of the insulating film 2 is etched, the end portion 4b of the insulating film 2 is etched from both the vertical and horizontal directions. The angle θ2 of the end portion 4b is much larger than the angle θ1 of the end portion 4a formed by the conventional manufacturing method, which is advantageous in that the metal electrode does not break. It has the following characteristics. [Effects of the Invention] As described above, by dividing the etching of the insulating film into two stages according to the method of manufacturing a semiconductor device according to the present invention, it is possible to provide a semiconductor device with extremely high reliability.
第１図（ａ）〜（ｄ）は従来の半導体装置の製造方法を
示す断面図である。第２図（ａ）〜（ｅ）は本発明の一
実施例による半導体装置の製造方法を示す断面図である
。
１・・・・・・半導体基板、２・・・・・・絶縁膜、３
・・・・・・フォトレジスト、４ａ・・・・・・従来の
半導体装置の製造方法による絶縁膜エツジ、４ｂ・・・
・・・本発明による半導体装置の製造方法による絶縁膜
エツジ、θ１・・・・・・従来の半導体装置の製造方法
による絶縁膜エッヂの角度、０２・・・・・・本発明に
よる半導体装置の製造方法による絶縁膜エッヂの角変。
５−FIGS. 1(a) to 1(d) are cross-sectional views showing a conventional method of manufacturing a semiconductor device. FIGS. 2(a) to 2(e) are cross-sectional views showing a method of manufacturing a semiconductor device according to an embodiment of the present invention. 1... Semiconductor substrate, 2... Insulating film, 3
...Photoresist, 4a...Insulating film edge by conventional semiconductor device manufacturing method, 4b...
... Insulating film edge according to the semiconductor device manufacturing method according to the present invention, θ1 ... ... Insulating film edge angle according to the conventional semiconductor device manufacturing method, 02 ... ... The semiconductor device according to the present invention Angular changes in the edge of the insulating film due to the manufacturing method. 5-
Claims (1)
と、前記フォトレジストを選択的に除去する工程と、さ
らに前記絶縁膜をエツチング液により前記フォトレジス
ト開口部の絶縁膜の少なくとも一部が前記半導体基板上
に残るようにエツチングする工程と、前記フォトレジス
トを除去し、さらに前記エツチング液により、少なくと
も前記フォトレジスト開口部に残存した絶縁膜を全て除
去するための時間以上エツチングする工程とを有するこ
とを特徴とする半導体装置の製造方法。A step of applying a photoresist to an insulating film on a semiconductor substrate, a step of selectively removing the photoresist, and a step of etching the insulating film so that at least a part of the insulating film in the opening of the photoresist is etched into the semiconductor substrate. the step of etching the photoresist so that it remains on the substrate; and the step of removing the photoresist and etching it with the etching solution for at least a time longer than enough to remove all the insulating film remaining in the photoresist opening. A method for manufacturing a semiconductor device, characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10919484A JPS60253232A (en) | 1984-05-29 | 1984-05-29 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10919484A JPS60253232A (en) | 1984-05-29 | 1984-05-29 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60253232A true JPS60253232A (en) | 1985-12-13 |
Family
ID=14504006
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10919484A Pending JPS60253232A (en) | 1984-05-29 | 1984-05-29 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60253232A (en) |
-
1984
- 1984-05-29 JP JP10919484A patent/JPS60253232A/en active Pending
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