JPH0353523A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH0353523A
JPH0353523A JP18962989A JP18962989A JPH0353523A JP H0353523 A JPH0353523 A JP H0353523A JP 18962989 A JP18962989 A JP 18962989A JP 18962989 A JP18962989 A JP 18962989A JP H0353523 A JPH0353523 A JP H0353523A
Authority
JP
Japan
Prior art keywords
film
polysilicon
polysilicon film
patterns
impurity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18962989A
Other languages
Japanese (ja)
Inventor
Tomoharu Mametani
豆谷 智治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP18962989A priority Critical patent/JPH0353523A/en
Publication of JPH0353523A publication Critical patent/JPH0353523A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To avoid any etching residue thereby enabling the patterns in excellent shape to be formed by a method wherein an impurity hardly etched away existing on a polysilicon film or a polycide film is previously removed and then the said film is patterned by dryetching process. CONSTITUTION:Firstly, an impurity such as a spontaneous oxide film 5, etc., formed on a polysilicon film 2 deposited on the surface of this semiconductor substrate 1 is removed. That is, the impurity is removed using an etching such as 15:1 buffered fluoric acid, etc., for around 30sec. Next, resist patterns 3 are formed on the surface of the polysilicon film 2 by normal photolithographic process. The polysilicon layer 2 is patterned to form polisilicon patterns 4 in specific shape by anisotropic dryetching process using the resist patterns 3 as masks. Later, the residual resist patterns 3 on the surface of the polysilicon film 2 whereon the polysilicon patterns 4 are formed are removed.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は半導体装置の製造方法に係り、詳しくは、半
導体基板の表面を覆うポリシリコン膜もしくはポリサイ
ド膜をドライエンチング処理によってパター二冫グする
際の前処理に関する.〔従来の技術〕 従来から、半導体基板の表面を覆うボリシリコン膜もし
くはポリサイド膜をドライエッチング処理でパターニン
グするに際しては、第2図(a)〜(d)の断面構造図
で手順を追って示すような方法が採用されている. すなわち、半導体基板1の表面は、第2図(a)で示す
ように、所定厚みで堆積したポリシリコン股(もしくは
ポリサイド膜)2によって覆われている.そこで、まず
、通常の写真製版処理を行ってポリシリコンIII2の
表面上に第2図(b)で示すようなレジストパターン3
を形成したうえ、異方性のドライエソチング処理によっ
てポリシリコン膜2をパターニングし、このポリシリコ
ン膜2に第2図(C)で示すような形状のポリシリコン
パターン4を形威する.そののち、第2図(d)で示す
ように、ポリシリコンパターン4が形成されたポリシリ
コン11!2の表面上に残存したレジストパターン3を
除去する. ところで、このポリシリコン膜2に対する不純物の注入
・拡散が必要な場合には、写真製版処理によるレジスト
パターン3の形成前に所要の不純物を注入して拡散して
おくようになっている。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device, and more specifically, a method for forming a pattern by dry etching a polysilicon film or a polycide film covering the surface of a semiconductor substrate. Regarding preprocessing when [Prior Art] Conventionally, when patterning a polysilicon film or a polycide film covering the surface of a semiconductor substrate by dry etching, the steps are shown in the cross-sectional structural diagrams of FIGS. 2(a) to 2(d). A method has been adopted. That is, the surface of the semiconductor substrate 1 is covered with a polysilicon layer (or polycide film) 2 deposited to a predetermined thickness, as shown in FIG. 2(a). Therefore, first, a normal photolithography process is performed to form a resist pattern 3 on the surface of the polysilicon III 2 as shown in FIG. 2(b).
After forming, the polysilicon film 2 is patterned by an anisotropic dry etching process, and a polysilicon pattern 4 having a shape as shown in FIG. 2(C) is formed on this polysilicon film 2. Thereafter, as shown in FIG. 2(d), the resist pattern 3 remaining on the surface of the polysilicon 11!2 on which the polysilicon pattern 4 was formed is removed. By the way, if it is necessary to implant and diffuse impurities into this polysilicon film 2, the required impurities are implanted and diffused before forming the resist pattern 3 by photolithography.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかしながら、前述した半導体装置の製造方法において
は、つぎのような不都合が生じていた.すなわち、その
半導体基Fi1を覆うポリシリコン膜(もしくはポリサ
イド膜)2の表面上にエッチングされにくい物質である
自然酸化膜(第2図(a)では、符号5で示す)や塵埃
などの異物が存在していると、ドライエッチング処理に
よって形威されたポリシリコンパターン4の内部に異物
からなるエッチング残渣(第2図(d)では、符号6で
示す゛)が発生することになり易く、良好な形状を有す
るパターンが得られなくなってしまう。また、ポリシリ
コン膜2に対して不純物を注入・拡散した場合には、そ
の表面にエソチングされにくい物質が発生し易くなる結
果、エッチング残渣6が非常に多く発生することになっ
ていた.この発明は、このような不都合に鑑みて創案さ
れたものであって、エンチング残渣の発生を防止し、良
好な形状を有するパターンを得ることが可能な半導体装
置の製造方法を提供することを目的としている. 〔課題を解決するための手段〕 本発明に係る半導体装置の製造方法は、このような目的
を達成するために、半導体基板の表面を覆うポリシリコ
ン膜もしくはポリサイド膜をドライエノチング処理でパ
ターニングするに際して、該ドライエッチング処理もし
くはこれに先立つ写真製版処理の直前に、前記ポリシリ
コン膜もしくはポリサイド膜上に形威された自然酸化膜
を含む異物を除去することを特徴とするものである。
However, the above-described semiconductor device manufacturing method has the following disadvantages. That is, on the surface of the polysilicon film (or polycide film) 2 covering the semiconductor substrate Fi1, there is a natural oxide film (indicated by reference numeral 5 in FIG. 2(a)), which is a substance that is difficult to etch, and foreign substances such as dust. If it exists, etching residue (indicated by reference numeral 6 in FIG. 2(d)) consisting of foreign matter is likely to be generated inside the polysilicon pattern 4 shaped by the dry etching process, which is a problem. Therefore, it becomes impossible to obtain a pattern having a specific shape. Furthermore, when impurities are implanted and diffused into the polysilicon film 2, substances that are difficult to be etched are likely to be generated on the surface of the polysilicon film 2, resulting in a large amount of etching residue 6 being generated. The present invention was devised in view of such disadvantages, and an object of the present invention is to provide a method for manufacturing a semiconductor device that can prevent the generation of etching residue and obtain a pattern with a good shape. It is said that [Means for Solving the Problems] In order to achieve the above object, the method for manufacturing a semiconductor device according to the present invention includes patterning a polysilicon film or a polycide film covering the surface of a semiconductor substrate by dry etching treatment. In this process, foreign matter including a native oxide film formed on the polysilicon film or polycide film is removed immediately before the dry etching process or the photolithography process that precedes the dry etching process.

〔作用〕[Effect]

上記方法によれば、ポリシリコン膜もしくはポリサイド
膜上に存在するエッチングされにくい物質である自然酸
化膜を含む異物を予め除去したうえでドライエンチング
処理によるパターニングを行うので、このドライエッチ
ング処理によって形威されたポリシリコン膜もしくはポ
リサイド膜のパターンの内部に異物からなるエフチング
残渣が発生することはなくなる. 〔実施例〕 以下、この発明方法の一実施例を図面に基づいて説明す
る. 第1図(a)〜(e)は、本発明に係る半導体装置の製
造方法の手順を示す断面構造図である。なお、これらの
第1図(a)〜(e)において、前述した従来方法を示
す第2図(a)〜(d)と互いに同一もしくは相当する
部分については同一符号を付している. 第1図(a)で示すように、この方法に用いる半導体基
板lの表面は、3000 Aというような所定厚みで堆
積したポリシリコン膜(もしくはポリサイド膜)2によ
って覆われている.そして、このポリシリコン膜2の表
面上には、エッチングされにくい物質である薄い自然酸
化膜5が形成されていたり、塵埃などの異物が存在して
いる.そこで、まず、第1図(b)で示すように、この
半導体基板lの表面に堆積したポリシリコン膜2上に存
在する自然酸化膜5などの異物を除去する.なお、この
異物除去は、l5:1バソファードふっ#1(BHF)
などのようなエッチング液を用いたうえで30秒程度に
わたって行うことになる。
According to the above method, patterning is performed by dry etching after removing foreign substances including the native oxide film, which is a material that is difficult to etch, existing on the polysilicon film or polycide film. Etching residue consisting of foreign matter will no longer be generated inside the pattern of the etched polysilicon film or polycide film. [Example] An example of the method of this invention will be described below based on the drawings. FIGS. 1(a) to 1(e) are cross-sectional structural views showing the steps of a method for manufacturing a semiconductor device according to the present invention. In addition, in these FIGS. 1(a) to (e), parts that are the same as or correspond to those in FIGS. 2(a) to (d) showing the conventional method described above are given the same reference numerals. As shown in FIG. 1(a), the surface of a semiconductor substrate l used in this method is covered with a polysilicon film (or polycide film) 2 deposited to a predetermined thickness of 3000 Å. On the surface of this polysilicon film 2, a thin natural oxide film 5, which is a substance that is difficult to etch, is formed, and foreign matter such as dust is present. First, as shown in FIG. 1(b), foreign matter such as the native oxide film 5 existing on the polysilicon film 2 deposited on the surface of the semiconductor substrate 1 is removed. In addition, this foreign matter removal is performed using l5:1 bath fed #1 (BHF).
The etching process is performed for about 30 seconds using an etching solution such as .

つぎに、通常の写真製版処理を行うことにより、ポリシ
リコン膜2の表面上に第I図(c)で示すようなレジス
トパターン3を形成する.そののち、このレジストバク
ーン3をマスクとする異方性のドライエノチング処理を
行うことによってポリシリコンII!2をパターニング
し、このポリシリコン膜2に第1図(d)で示すような
所定形状のポリシリコンパターン4を形或する。そのの
ち、第1図(e)で示すように、ポリシリコンパターン
4が形成されたポリンリコン′M2の表面上に残存した
レジストパターン3を除去する。
Next, a resist pattern 3 as shown in FIG. 1(c) is formed on the surface of the polysilicon film 2 by performing a normal photolithography process. Thereafter, by performing an anisotropic dry etching process using this resist vacuum 3 as a mask, polysilicon II! A polysilicon pattern 4 having a predetermined shape as shown in FIG. 1(d) is formed on this polysilicon film 2. Thereafter, as shown in FIG. 1(e), the resist pattern 3 remaining on the surface of the polysilicon M2 on which the polysilicon pattern 4 is formed is removed.

なお、半導体基板lの表面を覆うポリシリコン膜2に対
する不純物の注入・拡散が必要な場合には、まず、この
ポリシリコン膜2の表面上に自然酸化膜5やm壊などの
異物が存在している状態、すなわち、第1図(a)で示
す状態で所要の不純物を注入して拡散したのち、これら
の異物を除去することになる。
Note that when it is necessary to implant and diffuse impurities into the polysilicon film 2 covering the surface of the semiconductor substrate 1, it is necessary to first check the presence of foreign substances such as the native oxide film 5 and m-debris on the surface of the polysilicon film 2. After necessary impurities are implanted and diffused in the state shown in FIG. 1(a), these foreign substances are removed.

ところで、以上の説明においては、写真製版処理を行う
直前、すなわち、レジストパターン3を形威する直前に
自然酸化膜5を含む異物を除去することとしているが、
この異物の除去をドライエソチング処理の直前に行って
もよく、同様の結果が得られることはいうまでもない。
By the way, in the above explanation, it is assumed that foreign substances including the natural oxide film 5 are removed immediately before performing photolithography processing, that is, immediately before forming the resist pattern 3.
Needless to say, the removal of this foreign material may be performed immediately before the dry ethoching process, and the same result will be obtained.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明に係る半導体装置の製造方
法によれば、ポリシリコン膜もしくはポリサイド膜上に
存在するエッチングされにくい物質である自然酸化膜を
含む異物を予め除去したうえでポリシリコン膜もしくは
ポリサイド膜のドライエソチング処理によるパターニン
グを行うので、形成されたパターンの内部に異物からな
るエッチング残渣が発生することはなくなり、良好な形
状のパターンが得られることになる.その結果、歩留り
が高く、しかも、信頼性に優れた半導体装置を製造する
ことができる.
As explained above, according to the method for manufacturing a semiconductor device according to the present invention, foreign matter including a natural oxide film, which is a substance that is difficult to be etched, existing on a polysilicon film or a polycide film is removed in advance, and then the polysilicon film is removed. Alternatively, since patterning is performed by dry etching of a polycide film, etching residues made of foreign matter are not generated inside the formed pattern, and a pattern with a good shape can be obtained. As a result, semiconductor devices with high yield and excellent reliability can be manufactured.

【図面の簡単な説明】[Brief explanation of drawings]

第l図(a)〜(e)は本発明に係る半導体装置の製造
方法を示す断面構造図であり、第2図(a)〜(d)は
従来例に係る半導体装置の製造方法を示す断面構造図で
ある。 図における符号1は半導体基板、2はポリシリコンIl
l( ポリサイド膜)、4はポリシリコンパターン、5
は自然酸化膜(異物)である.なお、図中の同一符号は
、互いに同一もしくは相当する部品、部分を示している
1(a) to 1(e) are cross-sectional structural views showing a method of manufacturing a semiconductor device according to the present invention, and FIGS. 2(a) to 2(d) show a method of manufacturing a semiconductor device according to a conventional example. FIG. In the figure, numeral 1 is a semiconductor substrate, 2 is a polysilicon Il
l (polycide film), 4 is polysilicon pattern, 5
is a natural oxide film (foreign substance). Note that the same reference numerals in the figures indicate parts or parts that are the same or correspond to each other.

Claims (1)

【特許請求の範囲】[Claims] (1)半導体基板の表面を覆うポリシリコン膜もしくは
ポリサイド膜をドライエッチング処理でパターニングす
るに際して、 該ドライエッチング処理もしくはこれに先立つ写真製版
処理の直前に、前記ポリシリコン膜もしくはポリサイド
膜上に形成された自然酸化膜を含む異物を除去すること
を特徴とする半導体装置の製造方法。
(1) When patterning a polysilicon film or a polycide film covering the surface of a semiconductor substrate by dry etching processing, immediately before the dry etching processing or the preceding photolithography processing, a pattern formed on the polysilicon film or polycide film is A method for manufacturing a semiconductor device, characterized in that foreign matter including a native oxide film is removed.
JP18962989A 1989-07-20 1989-07-20 Manufacture of semiconductor device Pending JPH0353523A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18962989A JPH0353523A (en) 1989-07-20 1989-07-20 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18962989A JPH0353523A (en) 1989-07-20 1989-07-20 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH0353523A true JPH0353523A (en) 1991-03-07

Family

ID=16244496

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18962989A Pending JPH0353523A (en) 1989-07-20 1989-07-20 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH0353523A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100761980B1 (en) * 2006-07-20 2007-09-28 황현식 A temperature control circuit for heating mat

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6229141A (en) * 1985-07-31 1987-02-07 Hitachi Ltd Manufacture of semiconductor device
JPS62117343A (en) * 1985-11-16 1987-05-28 Oki Electric Ind Co Ltd Formation of contact of semiconductor device
JPS6436026A (en) * 1987-07-31 1989-02-07 Sony Corp Photo-etching

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6229141A (en) * 1985-07-31 1987-02-07 Hitachi Ltd Manufacture of semiconductor device
JPS62117343A (en) * 1985-11-16 1987-05-28 Oki Electric Ind Co Ltd Formation of contact of semiconductor device
JPS6436026A (en) * 1987-07-31 1989-02-07 Sony Corp Photo-etching

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100761980B1 (en) * 2006-07-20 2007-09-28 황현식 A temperature control circuit for heating mat

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