JPS6022508B2 - Manufacturing method of semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device in which a substrate electrode is formed on a substrate surface simultaneously with the formation of active elements of the semiconductor device.

Conventionally, in silicon gate field effect transistors, the substrate electrode that controls the channel current was formed on the back side of the semiconductor substrate, but since the electrode is on the back side of the substrate, it is difficult to assemble the case with the substrate surface electrode, which has the same potential as the substrate. It was connected, but the connection could not be made on the surface of the board. In the case
Depending on whether or not the substrate electrode is connected to other substrate surface electrodes, the case had to be manufactured accordingly. In order to solve this problem, a method of forming a substrate electrode on the surface of the substrate has been adopted, but in the conventional method, the number of work steps for closing the insulating film had to be increased.
FIG. 1 is a process diagram illustrating a method of forming a conventional silicon gate field effect transistor having a substrate electrode on the surface of a semiconductor substrate and a diffusion wiring electrode separate from the transistor. A silicon dioxide film 2 with a thickness of about 1 m is formed on the surface of a silicon substrate 1, and the silicon dioxide film 2 in the regions that are to become transistor parts and diffusion wiring is selectively removed and exposed by ordinary photolithography. Approximately 0.1 thickness on silicon surface
A silicon dioxide film 3 of 〆m is formed by a thermal oxidation method,
Furthermore, a polycrystalline silicon film 4 is formed thereon by vapor phase growth (FIG. 1a).

Selectively form polycrystalline silicon 4 that will become the gate and wiring of the transistor, use this polycrystalline silicon as a mask, remove silicon dioxide 3, diffuse impurities of the opposite conductivity type to the substrate, and form the source region 5 and drain region. 6. Form a wiring diffusion region 7 (FIG. 1b).

Next, after a silicon dioxide film 8 is formed on the surface by a vapor phase growth method, a window for taking out the Kazoku electrode is opened.

The region 9 where the substrate electrode is to be formed is made of silicon dioxide films 2 and 8.
Because of the overlap and thickness, only the upper silicon dioxide film 8 is removed, and the silicon dioxide film 2 is not removed (Fig. 1c).
). In order to close the substrate electrode extraction window, cover the area 9 other than the window with a photoresist film in the area 9 where the substrate electrode is to be formed.
The silicon dioxide film 2 is etched to form an opening 10 (FIG. 1d).

Next, aluminum is deposited by vacuum evaporation and selectively removed to form a source electrode 11, a drain electrode 12, a diffusion wiring electrode 13, and a substrate electrode 14.

Finally, by heat treatment, the eutectic part 1 of aluminum and silicon is
5 (Fig. 1e). As described above, the conventional method has the drawback that in order to form the substrate electrode 14 on the surface of the semiconductor substrate, one additional masking step is required to remove the silicon dioxide film, which increases the number of work steps.

The present invention eliminates the above-mentioned drawbacks and increases the number of work steps by forming a substrate electrode or an electrode other than the active device at the same time as forming an active device such as a silicon gate field effect transistor or a diode that can be formed at the same time. The present invention provides a method for manufacturing a semiconductor device that is formed without any process.

The present invention will be explained by examples. FIG. 2 is a process diagram when the method of the present invention is applied to the formation of a silicon gate field effect transistor, a diffusion wiring electrode, and a substrate electrode.

A silicon nitride film 22 is provided on the surface of a silicon substrate 21, and after selectively removing areas other than those where transistors, diffusion wiring and other electrodes are to be formed, a thick silicon dioxide film 23 is formed by thermal oxidation.

(FIG. 2a) Next, the silicon nitride film 22 is removed, and a silicon dioxide film 24 is formed by a thermal oxidation method or the like, and a polycrystalline silicon film 25 is formed thereon by a vapor phase growth method or the like.

(Figure 2b) Next, the polycrystalline silicon film 25 and the silicon dioxide film 24 are removed from areas other than the areas that are to become the transistor gate and wiring, and impurities of the opposite conductivity type to the substrate are removed from the exposed silicon surface. Diffused to form source region 26 and drain region 2
7. Form a diffusion wiring region 28 and a substrate electrode diffusion region 29.

During this diffusion, since the thick silicon dioxide film 23 has an oxide film that penetrates below the surface of the substrate, lateral diffusion of impurities is inhibited, so that the diffusion region does not expand in the lateral direction. (FIG. 2c) Next, by thermal oxidation, the polycrystalline silicon is covered with silicon dioxide and a silicon dioxide film 30 is formed on the diffusion region.

Furthermore, an electrode extraction window 31 is opened in each diffusion region. At this time, the substrate window 31 is opened to include the contact portion of the silicon dioxide film 23 at the upper end of the diffusion region 29, and at this time, a portion of the silicon dioxide film 23 is removed. (FIG. 2d) Next, aluminum is deposited by vacuum evaporation or the like, and then selectively removed to form a source electrode 32, a drain electrode 33, a diffusion wiring electrode 34, and a substrate electrode 35.

Finally, eutectic portions 36 and 37 of aluminum and silicon are formed by heat treatment. In this heat treatment, the aluminum of the substrate electrode 35 forms a co-alloy with the diffusion region 29, but at this time, this eutectic part 37 is maintained and grows along the substrate surface of the silicon dioxide film 23, causing a short circuit with the substrate 21. Then, a substrate electrode is formed. This is because aluminum is in contact with the bonding end of the diffusion region 29 that ends on the substrate surface, and like the other electrodes 32, 33, 34, the aluminum is inside the diffusion regions 26, 27, 28. If they are in contact with each other, the eutectic portion 35 will not protrude from the diffusion region even if it spreads laterally. In this way, the electrode 35 that short-circuits with the substrate and the electrodes 32, 33, and 34 that do not short-circuit with the substrate can be formed simultaneously with the formation of the active element, without increasing the number of steps. (Fig. 2e) In the above embodiment, a method was explained in which a substrate electrode was formed on the substrate surface at the same time as a silicon gate field effect transistor was formed. It is also possible to simultaneously form electrodes to this effect on the substrate surface.

It is also possible to omit or increase the number of electrodes that short-circuit with the substrate and electrodes that do not short-circuit with the substrate. Further, even when the substrate is divided into an impurity-diffused substrate and a non-diffused substrate, such as in a complementary field effect transistor, the present invention can be similarly applied as the substrate mentioned in the above embodiment. In addition, in the above example, aluminum was used as the electrode metal, but
Not limited to aluminum, any metal that can make ohmic contact with silicon can be used.

Furthermore, in the above embodiment, the aluminum of the electrode 35 is in contact with all of the junction ends ending at the surface of the diffusion region 29, but at least the surface end of the junction where the diffusion region 29 is in contact with the silicon dioxide film 23 is It is sufficient that a connecting window is provided containing the aluminum and that the aluminum contacts the junction end of the diffusion region.

Furthermore, if the area where aluminum is in contact with the junction end of the diffusion region is small and the amount of aluminum covering that area is sufficiently large, the effects of the present invention will be enhanced. As described in detail above, according to the present invention, the substrate electrode can be formed on the substrate surface without increasing the number of work steps, so that the substrate potential can be controlled from the substrate surface electrode.

Further, when it is desired to make the source electrode of the transistor the same potential as the substrate, providing a connection window at the upper boundary of the diffusion region allows easy short-circuiting, which is a remarkable effect in this field.

[Brief explanation of the drawing]

FIG. 1 is a process diagram illustrating a method of forming a conventional silicon gate field effect transistor having a substrate electrode on the surface of a semiconductor substrate and a diffusion wiring electrode separate from the transistor;
FIG. 2 is a process diagram when the method of the present invention is applied to form a silicon gate field effect transistor, a substrate electrode, and a diffusion wiring electrode. 1...Silicon substrate, 2...Silicon dioxide, 3
... Silicon dioxide film, 4 ... Polycrystalline silicon film, 5 ... Source region, 6 ... Drain region, 7 ... Wiring diffusion region, 8 ... ...Silicon dioxide film, 9...Region where substrate electrode is to be formed, 10...Opening for substrate electrode, 11...
... Source electrode, 12 ... Drain electrode, 13
... Diffusion wiring electrode, 14 ... Substrate electrode, 15 ... Aluminum. silicon substrate, 21
...Silicon substrate, 22...Nitride silicon I
Jcon film, 23...Silicon dioxide film, 24.
... Silicon dioxide film, 25 ... Polycrystalline silicon film, 26 ... Source region, 27 ...
... Drain region, 28 ... Diffusion wiring region, 29
......Substrate electrode diffusion region, 30...Silicon dioxide film, 31...Substrate electrode extraction window, 3
2... Source electrode, 33... Drain electrode, 34... Diffusion wiring electrode, 35... Substrate electrode, 36, 37... Aluminum. Silicon eutectic part. Shio' diagram (o) Spear' diagram (b) Chi' diagram (C) Sai? Diagram (d) Spear' diagram (e) Zu2 diagram (o) Z diagram (b) Sai2 diagram ku0) Fang2 diagram (d) Sai2 diagram (e)

Claims (1)

[Claims] 1. A step of forming a first insulating film having a plurality of openings on one main surface of a semiconductor substrate, a step of introducing impurities through the openings to form a plurality of impurity diffusion regions, and a step of forming a first insulating film having a plurality of openings on one principal surface of the semiconductor substrate. and selectively removing the insulating film so that at least one of the diffusion regions includes a surface end portion of the junction in contact with the first insulating film. At the same time, in other diffusion regions, a step of opening an electrode forming window inward from the surface edge of the bonding, and a step of opening a metal electrode covering each of the electrode forming windows. a step of forming a eutectic alloy of the electrode metal and a substrate body by heat treatment, and short-circuiting the electrode and the substrate in the at least one diffusion region. .