JPS60216541A - Introducing method of impurity to semiconductor substrate - Google Patents
Introducing method of impurity to semiconductor substrateInfo
- Publication number
- JPS60216541A JPS60216541A JP7327584A JP7327584A JPS60216541A JP S60216541 A JPS60216541 A JP S60216541A JP 7327584 A JP7327584 A JP 7327584A JP 7327584 A JP7327584 A JP 7327584A JP S60216541 A JPS60216541 A JP S60216541A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- impurity
- semiconductor substrate
- mask
- beams
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 42
- 239000012535 impurity Substances 0.000 title claims abstract description 19
- 238000000034 method Methods 0.000 title claims abstract description 15
- 239000004065 semiconductor Substances 0.000 title claims description 15
- 150000002500 ions Chemical class 0.000 claims abstract description 8
- 230000005684 electric field Effects 0.000 claims abstract description 4
- 238000000137 annealing Methods 0.000 claims description 4
- 238000006243 chemical reaction Methods 0.000 abstract description 6
- 230000007547 defect Effects 0.000 abstract description 4
- 239000013078 crystal Substances 0.000 abstract description 3
- 229910015844 BCl3 Inorganic materials 0.000 abstract 1
- 238000002513 implantation Methods 0.000 abstract 1
- FAQYAMRNWDIXMY-UHFFFAOYSA-N trichloroborane Chemical compound ClB(Cl)Cl FAQYAMRNWDIXMY-UHFFFAOYSA-N 0.000 abstract 1
- 238000005468 ion implantation Methods 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 3
- 229910052796 boron Inorganic materials 0.000 description 2
- -1 boron ions Chemical class 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000001678 irradiating effect Effects 0.000 description 2
- 230000010355 oscillation Effects 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
Landscapes
- Physics & Mathematics (AREA)
- High Energy & Nuclear Physics (AREA)
- Engineering & Computer Science (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の属する技術分野〕
本発明は、半導体基板に所定の導電形と不純物濃度を有
する層を形成するために半導体基板表面近傍の所定の領
域に不純物を導入する方法に関する0
〔従来技術とその問題点〕
半導体基板に所定の導電形と不純物濃度を有する層を形
成する方法として周知の方法は、半導体基板表面に不純
物源を被着し、基体内に熱拡散する方法があるが、この
方法は浅い接合の形成が困難なこと、また基板全体を1
000℃前後に加熱するため、それ以前に基板内に形成
された接合面の打込むイオン注入方法も最近広く用いら
れるように碌った。しかしイオンの注入の際の高いエネ
ルギーによシ基板に結晶欠陥が生ずるため、イオン注入
後基板を注入装置よシ取ル出し、加熱装置によ9900
℃前後の温度でアニールする必要がある0このため、取
シ出した際に外部ふん囲気にょシ汚染されるおそiがあ
少、また加熱にょシそれ以前に基板内に形成した接合が
変位する問題がやはり存在する。[Detailed description of the invention] [Technical field to which the invention pertains] The present invention relates to a method of introducing impurities into a predetermined region near the surface of a semiconductor substrate in order to form a layer having a predetermined conductivity type and impurity concentration on the semiconductor substrate. Related 0 [Prior art and its problems] A well-known method for forming a layer having a predetermined conductivity type and impurity concentration on a semiconductor substrate is to deposit an impurity source on the surface of the semiconductor substrate and thermally diffuse it into the substrate. There is a method, but this method is difficult to form shallow junctions, and requires the entire substrate to be
Recently, an ion implantation method in which the bonding surface previously formed in the substrate is implanted by heating to around 000° C. has become widely used. However, the high energy during ion implantation causes crystal defects in the substrate, so after ion implantation, the substrate is taken out of the implanter and heated to 9900 m
It is necessary to anneal the board at a temperature of around 30°F.For this reason, there is a small risk of contaminating the external environment when the board is taken out, and the bond previously formed in the board may be displaced due to heating. The problem still exists.
本発明は、上述の欠点を排除し、基板温度を高めること
なく、マた工程中に外気に触れることなく基板の所定の
領域に不純物を導入することができる方法を提供するこ
とを目的とする。The present invention aims to eliminate the above-mentioned drawbacks and provide a method that allows impurities to be introduced into a predetermined region of a substrate without increasing the substrate temperature and without exposing it to the outside air during the molding process. .
本発明によれば、半導体基板表面に不純物を含むガスを
接触させ、不純物を導入すべき領域のパターンと同一の
透光パターンを有するマスクを通して不純物元素をイオ
ン化するエネルギーを与える光を照射し、生じたイオン
を電界にょシ加速して半導体基板に打込み、次いで少な
くとも半導体基板のイオンを打込まれた領域に熱エネル
ギーを与える光を照射してアニールすることKよシ上記
の目的が達成される◇イオン化のための光は、イオン化
に必要なエネルギーに対応する波長より短波長で、吸収
が著しくなるほど短くない波長の光が用いられ、従って
波長1000ないし4000Xの紫外光が望ましい。According to the present invention, a gas containing impurities is brought into contact with the surface of a semiconductor substrate, and light is irradiated to give energy to ionize impurity elements through a mask having a transparent pattern that is the same as the pattern of a region where impurities are to be introduced. The above purpose is achieved by accelerating the ions in an electric field and implanting them into a semiconductor substrate, and then annealing by irradiating at least the region of the semiconductor substrate into which the ions have been implanted with light that gives thermal energy. The light used for ionization has a wavelength shorter than the wavelength corresponding to the energy required for ionization, and is not so short that absorption becomes significant. Therefore, ultraviolet light with a wavelength of 1000 to 4000X is preferable.
以下、本発明の実施のだめの装置を示す第1図を引用し
て、nfiシリコン基板にはう素イオンを注入し、アニ
ールする実施例について説明する◇n型シリコン基基板
は反応室2の底部のヒータ3によシ100℃に加熱され
た(場合によっては加熱しなくてもよい)陰極板4の上
に置かれている〇反応室2内を真空ポンプ5によF)
0.01 Torr以下の真空にしたのち、マス70メ
ータ6によシ100m1/―の流量に制御された艶13
ガスをボンベ7から反応室内に導入して50Torr程
度の圧力に保り◇基板1の直上約1■の所にマスク8が
対向している。マスク8は不純物を注入すべき領域と同
じパターンの透光部を有し、この透光部を通して193
0Aの波長のArFエキシマレーザの発振光9が鏡10
、レンズ11を介して基板lの直上で焦点を結ぶように
照射される。照射光は、パワー密度2 MW/cd、径
2μmのビームとして基板上を走査されBCA 3ガス
をイオン化し、生じたほう素の陽イオンは、陰極板4と
その上方1Ocfnの位置にある陽極板12との間に電
源13によって印加される直流バイアスによル加速され
て基板1に打込まれる。打込まれたイオン14は、マス
クの透光部に対向する所定の領域にのみ存在する0次い
で、反応室内のふん囲気をボンベ15からのN2ガスに
切換えてから鏡lOを回転し、cO□ガスレーザの波長
9.6μmの発振光16をマスク8を通してイオン14
の注入領域に10 MW/+dのパワー密度で照射する
。これにより、Bイオン注入時に生じた結晶欠陥はアニ
ールされ、健全なp属領域が形成される。基板1は光の
照射領域の表面近くだけレーザ光にょ夛加熱されるだけ
で、他の領域の温度はほとんど上昇しないから、予め形
成された他の接合の位置が変化することはない。他の接
合の位置によっては、co2レーザ光16の照射時にマ
スク8を反応室外からの操作で基板lの上から外して基
板lの全面にレーザ光を照射して全面を7ニールしても
よい。An example of implanting boron ions into an NFI silicon substrate and annealing will be described below with reference to FIG. The inside of the reaction chamber 2 is placed on the cathode plate 4 which is heated to 100°C by the heater 3 (heating may not be necessary depending on the case).
After creating a vacuum of 0.01 Torr or less, the gloss 13 was controlled to a flow rate of 100 m1/- through a mass 70 meter 6.
A gas is introduced into the reaction chamber from a cylinder 7 and kept at a pressure of about 50 Torr, and a mask 8 is opposed to the substrate 1 at a position about 1 inch directly above it. The mask 8 has a transparent part with the same pattern as the region where impurities are to be implanted, and 193
The oscillation light 9 of the ArF excimer laser with a wavelength of 0 A is reflected by the mirror 10.
, is irradiated through the lens 11 so as to be focused directly above the substrate l. The irradiation light is scanned over the substrate as a beam with a power density of 2 MW/cd and a diameter of 2 μm to ionize the BCA 3 gas, and the generated boron cations are transferred to the cathode plate 4 and the anode plate located 1Ocfn above it. 12 and is accelerated by a DC bias applied by a power source 13 and is implanted into the substrate 1. The implanted ions 14 exist only in a predetermined area facing the transparent part of the mask.Next, the atmosphere in the reaction chamber is changed to N2 gas from the cylinder 15, and the mirror lO is rotated, cO□ Oscillation light 16 of a gas laser with a wavelength of 9.6 μm is passed through a mask 8 to ions 14.
The implanted area is irradiated with a power density of 10 MW/+d. As a result, crystal defects generated during B ion implantation are annealed, and a healthy p-type region is formed. The substrate 1 is only heated by the laser beam in the vicinity of the surface of the light irradiation area, and the temperature in other areas hardly increases, so the positions of other pre-formed junctions do not change. Depending on the position of other bonding, the mask 8 may be removed from the top of the substrate l by an operation from outside the reaction chamber during irradiation with the CO2 laser beam 16, and the entire surface of the substrate l may be irradiated with laser light to 7 times the entire surface. .
本発明は、半導体基板に導入すべき不純物を含むガスに
、導入すべき領域の直上においてのみ光を照射してイオ
ン化し、電界にょシそのイオンを加速して基板に打込み
、さらに生じた結晶欠陥のアニールも光の照射によって
行うもので、同一反応室内での連続した工程で処理でき
るため基板の汚染の虞がなく、また基板全体が高温に加
熱されることがないので、既に基板内に形成された接合
の位置に影響を及はされることがないなどその効果は極
めて大きい。In the present invention, a gas containing impurities to be introduced into a semiconductor substrate is ionized by irradiating light only directly above the region to be introduced, and the ions are accelerated by an electric field and implanted into the substrate. Annealing is also performed using light irradiation, and since it can be performed in consecutive steps in the same reaction chamber, there is no risk of contaminating the substrate.Also, since the entire substrate is not heated to high temperatures, The effect is extremely large, as it does not affect the position of the bonded joint.
第1図は本発明の一実施例のための装置の断面図である
。FIG. 1 is a cross-sectional view of an apparatus for one embodiment of the invention.
Claims (1)
法において、半導体基板表面に不純物を含むガスも接触
させ、前記所定の領域のパターンと同一の透光パターン
を有するマスクを通してイオン化エネルギーを与える光
を照射し、生じた不純物元素イオンを電界によシ加速し
て半導体基板に打込み、次いで少なくとも半導体基板の
イオンの打込まれた領域に熱エネルギーを与える光を照
射してアニールすることを特徴とする半導体基板への不
純物導入方法。 2、特許請求の範囲第1項記載の方法において、イオン
化エネルギーを与える光が波長1000ないし4000
Xの紫外光であることを特徴とする半導体基板への不純
物導入方法。[Scope of Claims] 1) A method for introducing impurities into a predetermined region near the surface of a semiconductor substrate, in which a gas containing an impurity is also brought into contact with the surface of the semiconductor substrate, and a mask having a light-transmitting pattern identical to the pattern of the predetermined region is provided. The impurity element ions produced are accelerated by an electric field and implanted into the semiconductor substrate, and then the semiconductor substrate is irradiated with light that imparts thermal energy to at least the region where the ions are implanted. A method for introducing impurities into a semiconductor substrate, the method comprising annealing. 2. In the method according to claim 1, the light providing ionization energy has a wavelength of 1000 to 4000.
A method for introducing impurities into a semiconductor substrate, characterized by using ultraviolet light of X.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7327584A JPS60216541A (en) | 1984-04-12 | 1984-04-12 | Introducing method of impurity to semiconductor substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7327584A JPS60216541A (en) | 1984-04-12 | 1984-04-12 | Introducing method of impurity to semiconductor substrate |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60216541A true JPS60216541A (en) | 1985-10-30 |
Family
ID=13513437
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7327584A Pending JPS60216541A (en) | 1984-04-12 | 1984-04-12 | Introducing method of impurity to semiconductor substrate |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60216541A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63148685A (en) * | 1986-12-11 | 1988-06-21 | Sharp Corp | Manufacture of solar cell element |
-
1984
- 1984-04-12 JP JP7327584A patent/JPS60216541A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63148685A (en) * | 1986-12-11 | 1988-06-21 | Sharp Corp | Manufacture of solar cell element |
JPH0565066B2 (en) * | 1986-12-11 | 1993-09-16 | Sharp Kk |
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