JPS60216540A - Introducing method of impurity to semiconductor substrate - Google Patents
Introducing method of impurity to semiconductor substrateInfo
- Publication number
- JPS60216540A JPS60216540A JP7327284A JP7327284A JPS60216540A JP S60216540 A JPS60216540 A JP S60216540A JP 7327284 A JP7327284 A JP 7327284A JP 7327284 A JP7327284 A JP 7327284A JP S60216540 A JPS60216540 A JP S60216540A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- region
- ions
- semiconductor substrate
- chamber
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 43
- 239000004065 semiconductor Substances 0.000 title claims abstract description 19
- 239000012535 impurity Substances 0.000 title claims abstract description 17
- 238000000034 method Methods 0.000 title claims description 13
- 150000002500 ions Chemical class 0.000 claims abstract description 12
- 238000000137 annealing Methods 0.000 claims abstract description 4
- 230000005684 electric field Effects 0.000 claims description 3
- 230000001678 irradiating effect Effects 0.000 claims description 2
- 239000013078 crystal Substances 0.000 abstract description 4
- 230000007547 defect Effects 0.000 abstract description 4
- 238000011109 contamination Methods 0.000 abstract description 3
- 229910015844 BCl3 Inorganic materials 0.000 abstract 2
- FAQYAMRNWDIXMY-UHFFFAOYSA-N trichloroborane Chemical compound ClB(Cl)Cl FAQYAMRNWDIXMY-UHFFFAOYSA-N 0.000 abstract 2
- 238000002513 implantation Methods 0.000 abstract 1
- 238000005468 ion implantation Methods 0.000 description 5
- 238000006243 chemical reaction Methods 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 229910052796 boron Inorganic materials 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- -1 boron ions Chemical class 0.000 description 2
- 230000010355 oscillation Effects 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 239000003570 air Substances 0.000 description 1
- 239000012080 ambient air Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 210000003608 fece Anatomy 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
Landscapes
- Physics & Mathematics (AREA)
- High Energy & Nuclear Physics (AREA)
- Engineering & Computer Science (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の属する技術分野〕
本発明は、半導体基板に所定の導電形と不純物濃度を有
する層を形成するために半導体基板表面近傍の所定の領
域に不純物を導入する方法に関す桑O
〔従来技術とその問題点〕
半導体基板に所定の導電形と不純物濃度を有する層を形
成する方法として周知の方法は、半導体基板表面に不純
物源を被着し、基体内に熱拡散する方法であるが、この
方法は浅い接合の形成が困難なこと、また基板全体を1
000℃前後に加熱するため、それ以前に基板内に形成
された接合面の移動、変形等をもたらす等の欠点がある
。これに対し不純物を高周波放電、電子衝撃などによっ
て ′イオン化し、を芥によって加速して半導体基板に
打込むイオン注入方法も最近広く用いられるようになっ
た。しかしイオンの注入の際の高いエネルギーによ)基
板に結晶欠陥が生ずるため、イオン注入後基板を注入装
置よシ取シ出し、加熱装置によル900℃前後の温度で
アニールする必要かある・このため、取シ出した際に外
部ふん囲気により汚染されるおそれがあシ、″1−IC
:加熱にょシそれ以前に基板内に形成した接合が変位す
る問題かやはシ存在する。[Detailed description of the invention] [Technical field to which the invention pertains] The present invention relates to a method of introducing impurities into a predetermined region near the surface of a semiconductor substrate in order to form a layer having a predetermined conductivity type and impurity concentration on the semiconductor substrate. [Prior art and its problems] A well-known method for forming a layer with a predetermined conductivity type and impurity concentration on a semiconductor substrate is to deposit an impurity source on the surface of the semiconductor substrate and heat the inside of the substrate. However, this method is difficult to form shallow junctions, and requires the entire substrate to be
Since it is heated to around 000° C., there are drawbacks such as movement and deformation of the bonding surface previously formed in the substrate. On the other hand, an ion implantation method has recently become widely used, in which impurities are ionized by high-frequency discharge, electron bombardment, etc., and then accelerated with garbage and implanted into the semiconductor substrate. However, since crystal defects occur in the substrate due to the high energy during ion implantation, it is necessary to take the substrate out of the implanter after ion implantation and anneal it in a heating device at a temperature of around 900°C. Therefore, there is a risk of contamination from the external feces when the IC is removed.
There is a problem that the bond previously formed in the substrate may be displaced due to heating.
本発明は、上述の欠点を排除し、基板温度を高めること
なく、また工程中に外気に触れることなく基板の所定の
領域に不純物を導入することができる方法を提供するこ
とを目的とする。The present invention aims to eliminate the above-mentioned drawbacks and to provide a method that allows impurities to be introduced into a predetermined region of a substrate without increasing the substrate temperature and without exposing the substrate to outside air during the process.
本発明によれば、半導体基板表面に不純物を含むガスを
接触させ、基板表面の不純物を導入すべき領域の直上に
不純物元素をイオン化するエネルギーを与える光を走査
し、生じたイオンを電界によシ加速して半導体基板に打
込み、次いで少なくとも半導体基板のイオンを打込まれ
た領域に熱エネルギーを与える光を照射してアニールす
ることによシ上記の目的が達成される。イオン化のため
の光は、イオン化に必要なエネルギーに対応する波長よ
シ短波長ではあるが、吸収が著しく人るほど短くない波
長の光が用いられ、従って波長1000ないし4000
Aの紫外光が望ましい〇〔発明の実施例〕
以下、本発明の実施のだめの装置を示した第1図を引用
してシリコン基板に#なう素イオンを注入し、アニール
する実施例について説明する。n型シリコン基板1は反
応室2の底部のヒータ3によ、り100℃に加熱された
(場合によっては加熱しなくてもよい)陰極板4の上に
置かれているO反応室2内を真空ポンプ5にIよj)
0.01 Tc)rr以下の真空にしたのち、マス70
−メータ6によシ100m1/―の流量に制御され九B
Cノ、ガスをボンベ7から反応室内に導入して50 T
orr程度の圧力に保つO次ニ1930Xの波長のAr
Fエキシマレーザの発振光8を鏡9を介してレンズ10
によシ基板lの直上で焦点を結び、径2μmでパワー密
度2W―のビームとして、鏡9および図示しない格子な
らびにシャッタを用いて基板1のほう素を導入すべき領
域の上を走査する0この光によpxi3ガスから#1う
素イオンが生じ、この陽イオンは陰極板4とその上方に
105Iの距離を置いて対向する陽極板110間に電源
12によって印加される直流バイアスによシ加速されて
基板IK打込まれるO打込まれたほう素イオンは、レー
ザ光8の走査された領域にのみ存在する。次いで、反応
室2内のふん囲気をボンベ13からのN2ガスに変換し
てから、鏡9を回転してCO2ガスレーザの波長9.6
μmの発振光14によって基板1のBイオンの注入領域
上、あるいは全面を1 o MW/aAのパワー密度の
ビームとして走査する。これによシ、Bイオン注入時に
生じた結晶欠陥はアニールされ、健全なp型領域が形成
され、pn接合ができ上がる。シリコン基板1はレーザ
光14によシ表面近くのイオン注入領域の近傍のみが加
熱されるにすぎないから、それ以外の部分の温度は低温
に保持されたままであシ、予め形成された他の接合の位
置の変化をひき起こすことはない◎
〔発明の効果〕
本発明は、半導体基板に導入すべき不純物を含むガスに
、導入すべき領域の直上においてのみ光を走査してイオ
ン化し、電界によシ生じたイオンを加速して基板に打込
み、さらに生じた結晶欠陥のアニールも光の照射によっ
て行うもので、同一反応室での連続した工程で処理でき
るため基板の汚染の虞がなく、また基板全体が高温に加
熱されることがないので、既に基板内に形成された接合
の位置が変化することがないなど半導体装置、特に半導
体集積回路の製造に極めて有効に適用される0According to the present invention, a gas containing an impurity is brought into contact with the surface of a semiconductor substrate, and light giving energy to ionize the impurity element is scanned directly above the region of the substrate surface where the impurity is to be introduced, and the generated ions are driven by an electric field. The above object is achieved by implanting ions into a semiconductor substrate at accelerated speed, and then annealing by irradiating at least the region of the semiconductor substrate into which the ions have been implanted with light that imparts thermal energy. The light used for ionization has a shorter wavelength than the wavelength corresponding to the energy required for ionization, but it is not so short that absorption is significant; therefore, the wavelength is 1000 to 4000.
Ultraviolet light of A is preferable〇 [Embodiment of the invention] Hereinafter, referring to FIG. 1 showing an apparatus for carrying out the present invention, an embodiment of implanting # and annealing the silicon substrate with # ions will be described. do. An n-type silicon substrate 1 is placed on a cathode plate 4 heated to 100° C. (in some cases, heating may not be necessary) by a heater 3 at the bottom of the reaction chamber 2. to the vacuum pump 5)
After creating a vacuum below 0.01 Tc)rr, mass 70
- The flow rate is controlled to 100 m1/- by meter 6.
C, gas was introduced into the reaction chamber from cylinder 7 at 50 T.
Ar with a wavelength of O order 1930X maintained at a pressure of about orr.
The oscillation light 8 of the F excimer laser is passed through a mirror 9 to a lens 10.
The beam is focused directly above the substrate 1, and is scanned as a beam with a diameter of 2 μm and a power density of 2 W over the region of the substrate 1 where boron is to be introduced using a mirror 9, a grating, and a shutter (not shown). This light generates #1 boron ions from the pxi3 gas, and these positive ions are stimulated by the DC bias applied by the power supply 12 between the cathode plate 4 and the anode plate 110 facing above with a distance of 105I. The O-implanted boron ions that are accelerated and implanted into the substrate IK exist only in the region scanned by the laser beam 8. Next, the ambient air in the reaction chamber 2 is converted into N2 gas from the cylinder 13, and then the mirror 9 is rotated to change the wavelength of the CO2 gas laser to 9.6.
The B ion implantation region or the entire surface of the substrate 1 is scanned as a beam with a power density of 1 o MW/aA using the oscillation light 14 of μm. As a result, crystal defects generated during B ion implantation are annealed, a healthy p-type region is formed, and a pn junction is completed. Since the silicon substrate 1 is heated by the laser beam 14 only in the vicinity of the ion-implanted region near the surface, the temperature of the other parts remains low. It does not cause a change in the position of the bond. [Effects of the Invention] The present invention scans light to ionize a gas containing impurities to be introduced into a semiconductor substrate only directly above the region to be introduced, and applies an electric field to the gas. The resulting ions are accelerated and implanted into the substrate, and the resulting crystal defects are annealed using light irradiation. Because the process can be performed in consecutive steps in the same reaction chamber, there is no risk of contaminating the substrate. In addition, since the entire substrate is not heated to a high temperature, the positions of the bonds already formed within the substrate will not change, making it extremely effective for manufacturing semiconductor devices, especially semiconductor integrated circuits.
第1図は本発明の一実施例のための装置の断面図である
。FIG. 1 is a cross-sectional view of an apparatus for one embodiment of the invention.
Claims (1)
法において、半導体基板表面に不純物を含むガスを接触
させ、基板表面の前記所定の領域の直上に不純物元素を
イオン化するエネルギーを与える光を走査し、生じたイ
オンを電界によシ加速して半導体基板に打込み、次いで
少なくとも半導体基板のイオンを打込まれた領域に熱エ
ネルギーを与える光を照射してアニールすることを特徴
とする半導体基板への不純物導入方法。 2、特許請求の範囲第1項記載の方法において、イオン
化エネルギーを与える光が波長1000ないし4000
Xの紫外光であることを特徴とする半導体基板への不純
物導入方法。[Claims] 1) In a method of introducing impurities into a predetermined region near the surface of a semiconductor substrate, a gas containing an impurity is brought into contact with the surface of the semiconductor substrate to ionize an impurity element directly above the predetermined region on the surface of the substrate. The method involves scanning light that gives energy, accelerating the generated ions using an electric field, and implanting them into a semiconductor substrate, and then annealing by irradiating at least the region of the semiconductor substrate into which the ions have been implanted with light that gives thermal energy. Characteristic method of introducing impurities into semiconductor substrates. 2. In the method according to claim 1, the light providing ionization energy has a wavelength of 1000 to 4000.
A method for introducing impurities into a semiconductor substrate, characterized by using ultraviolet light of X.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7327284A JPS60216540A (en) | 1984-04-12 | 1984-04-12 | Introducing method of impurity to semiconductor substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7327284A JPS60216540A (en) | 1984-04-12 | 1984-04-12 | Introducing method of impurity to semiconductor substrate |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60216540A true JPS60216540A (en) | 1985-10-30 |
Family
ID=13513352
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7327284A Pending JPS60216540A (en) | 1984-04-12 | 1984-04-12 | Introducing method of impurity to semiconductor substrate |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60216540A (en) |
-
1984
- 1984-04-12 JP JP7327284A patent/JPS60216540A/en active Pending
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