JPS6021618A - オンチツプクロツク発生器を有するマクロセルアレイ - Google Patents

オンチツプクロツク発生器を有するマクロセルアレイ

Info

Publication number
JPS6021618A
JPS6021618A JP59129898A JP12989884A JPS6021618A JP S6021618 A JPS6021618 A JP S6021618A JP 59129898 A JP59129898 A JP 59129898A JP 12989884 A JP12989884 A JP 12989884A JP S6021618 A JPS6021618 A JP S6021618A
Authority
JP
Japan
Prior art keywords
transistor
output
input
coupled
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59129898A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0349214B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
アラン・エス・バス
シ・チユアン・リ−
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of JPS6021618A publication Critical patent/JPS6021618A/ja
Publication of JPH0349214B2 publication Critical patent/JPH0349214B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/153Arrangements in which a pulse is delivered at the instant when a predetermined characteristic of an input signal is present or at a fixed time interval after this instant
    • H03K5/1534Transition or edge detectors
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/923Active solid-state devices, e.g. transistors, solid-state diodes with means to optimize electrical conductor current carrying capacity, e.g. particular conductor aspect ratio

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Manipulation Of Pulses (AREA)
  • Logic Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
JP59129898A 1983-07-01 1984-06-23 オンチツプクロツク発生器を有するマクロセルアレイ Granted JPS6021618A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US510042 1983-07-01
US06/510,042 US4593205A (en) 1983-07-01 1983-07-01 Macrocell array having an on-chip clock generator

Publications (2)

Publication Number Publication Date
JPS6021618A true JPS6021618A (ja) 1985-02-04
JPH0349214B2 JPH0349214B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1991-07-26

Family

ID=24029126

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59129898A Granted JPS6021618A (ja) 1983-07-01 1984-06-23 オンチツプクロツク発生器を有するマクロセルアレイ

Country Status (2)

Country Link
US (1) US4593205A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JPS6021618A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1003549B (zh) * 1985-01-25 1989-03-08 株式会社日立制作所 半导体集成电路器件
DE3673942D1 (de) * 1985-09-27 1990-10-11 Siemens Ag Schaltungsanordnung zur kompensation des temperaturganges von gatterlaufzeiten.
US4808861A (en) * 1986-08-29 1989-02-28 Texas Instruments Incorporated Integrated circuit to reduce switching noise
US4933576A (en) * 1988-05-13 1990-06-12 Fujitsu Limited Gate array device having macro cells for forming master and slave cells of master-slave flip-flop circuit
JPH03162130A (ja) * 1989-11-21 1991-07-12 Fujitsu Ltd 半導体集積回路
US5251228A (en) * 1989-12-05 1993-10-05 Vlsi Technology, Inc. Reliability qualification vehicle for application specific integrated circuits
US5376849A (en) * 1992-12-04 1994-12-27 International Business Machines Corporation High resolution programmable pulse generator employing controllable delay
US6675361B1 (en) * 1993-12-27 2004-01-06 Hyundai Electronics America Method of constructing an integrated circuit comprising an embedded macro
US5671397A (en) * 1993-12-27 1997-09-23 At&T Global Information Solutions Company Sea-of-cells array of transistors
USRE37577E1 (en) 1996-01-11 2002-03-12 Cypress Semiconductor Corporation High speed configuration independent programmable macrocell
US20070030019A1 (en) * 2005-08-04 2007-02-08 Micron Technology, Inc. Power sink for IC temperature control
US9666212B2 (en) 2012-12-05 2017-05-30 Seagate Technology Llc Writer with protruded section at trailing edge

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5650630A (en) * 1979-10-01 1981-05-07 Mitsubishi Electric Corp Semiconductor integrated circuit
JPS5761214A (en) * 1980-09-30 1982-04-13 Dainichi Nippon Cables Ltd Method of producing insulated wire

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3522446A (en) * 1967-08-31 1970-08-04 Tokyo Shibaura Electric Co Current switching logic circuit
NL145374B (nl) * 1969-07-11 1975-03-17 Siemens Ag Schakeling voor het vormen van het uitgangsoverdrachtcijfer bij een volledige binaire opteller.
US3906212A (en) * 1971-08-18 1975-09-16 Siemens Ag Series-coupled emitter coupled logic (ECL) circuit having a plurality of independently controllable current paths in a lower plane
US3808475A (en) * 1972-07-10 1974-04-30 Amdahl Corp Lsi chip construction and method
US4069429A (en) * 1976-09-13 1978-01-17 Harris Corporation IGFET clock generator
JPS53114651A (en) * 1977-03-17 1978-10-06 Fujitsu Ltd Electronic circuit
US4140927A (en) * 1977-04-04 1979-02-20 Teletype Corporation Non-overlapping clock generator
US4278897A (en) * 1978-12-28 1981-07-14 Fujitsu Limited Large scale semiconductor integrated circuit device
JPS5720448A (en) * 1980-07-11 1982-02-02 Nippon Telegr & Teleph Corp <Ntt> Semiconductor integrated circuit device
JPS57133662A (en) * 1981-02-13 1982-08-18 Nec Corp Master sliced large scale integration substrate
JPS5835963A (ja) * 1981-08-28 1983-03-02 Fujitsu Ltd 集積回路装置
DE3215518C1 (de) * 1982-04-26 1983-08-11 Siemens AG, 1000 Berlin und 8000 München Verknuepfungsglied mit einem Emitterfolger als Eingangsschaltung

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5650630A (en) * 1979-10-01 1981-05-07 Mitsubishi Electric Corp Semiconductor integrated circuit
JPS5761214A (en) * 1980-09-30 1982-04-13 Dainichi Nippon Cables Ltd Method of producing insulated wire

Also Published As

Publication number Publication date
JPH0349214B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1991-07-26
US4593205A (en) 1986-06-03

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