JPS60214655A - フレ−ム同期回路 - Google Patents

フレ−ム同期回路

Info

Publication number
JPS60214655A
JPS60214655A JP59072152A JP7215284A JPS60214655A JP S60214655 A JPS60214655 A JP S60214655A JP 59072152 A JP59072152 A JP 59072152A JP 7215284 A JP7215284 A JP 7215284A JP S60214655 A JPS60214655 A JP S60214655A
Authority
JP
Japan
Prior art keywords
signal
synchronization
logic
frame
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59072152A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0314250B2 (enExample
Inventor
Ikuo Iizuka
飯塚 育生
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP59072152A priority Critical patent/JPS60214655A/ja
Publication of JPS60214655A publication Critical patent/JPS60214655A/ja
Publication of JPH0314250B2 publication Critical patent/JPH0314250B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/04Speed or phase control by synchronisation signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP59072152A 1984-04-11 1984-04-11 フレ−ム同期回路 Granted JPS60214655A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59072152A JPS60214655A (ja) 1984-04-11 1984-04-11 フレ−ム同期回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59072152A JPS60214655A (ja) 1984-04-11 1984-04-11 フレ−ム同期回路

Publications (2)

Publication Number Publication Date
JPS60214655A true JPS60214655A (ja) 1985-10-26
JPH0314250B2 JPH0314250B2 (enExample) 1991-02-26

Family

ID=13480994

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59072152A Granted JPS60214655A (ja) 1984-04-11 1984-04-11 フレ−ム同期回路

Country Status (1)

Country Link
JP (1) JPS60214655A (enExample)

Also Published As

Publication number Publication date
JPH0314250B2 (enExample) 1991-02-26

Similar Documents

Publication Publication Date Title
EP0096854B1 (en) Framing system
US4920535A (en) Demultiplexer system
EP0425851B1 (en) Apparatus for decoding frames from a data link
US3893072A (en) Error correction system
EP0254386B1 (en) Digital transmission system
EP0280013A1 (en) Device for verifying proper operation of a checking code generator
US5195093A (en) Method and apparatus for ensuring CRC error generation by a data communication station experiencing transmitter exceptions
US4279034A (en) Digital communication system fault isolation circuit
GB1561369A (en) Binary data receiver
US3961311A (en) Circuit arrangement for correcting slip errors in receiver of cyclic binary codes
US5228036A (en) Frame synchronization stabilizer
US3938086A (en) Circuit arrangement for correcting slip errors in pcm receivers
US4680765A (en) Autosync circuit for error correcting block decoders
JPS60214655A (ja) フレ−ム同期回路
JPS61190755A (ja) アドレス回路
RU2043652C1 (ru) Устройство для сопряжения эвм с каналом связи
JP3290331B2 (ja) ブロック同期処理回路
JP2967703B2 (ja) 同期検出回路
US5463631A (en) Error pulse width expanding circuit
JPS63107330A (ja) フレ−ム同期装置の同期保護回路
JPH0691514B2 (ja) ビツト列一致判定回路
JPH05114898A (ja) デイジタル伝送システムのフレーム同期回路
JPH03235441A (ja) セル同期回路
RU1777245C (ru) Устройство дл обнаружени ошибок дискретного канала передачи информации
US3437996A (en) Error correcting circuit