JPS6020266A - メモリ制御方式 - Google Patents
メモリ制御方式Info
- Publication number
- JPS6020266A JPS6020266A JP58127610A JP12761083A JPS6020266A JP S6020266 A JPS6020266 A JP S6020266A JP 58127610 A JP58127610 A JP 58127610A JP 12761083 A JP12761083 A JP 12761083A JP S6020266 A JPS6020266 A JP S6020266A
- Authority
- JP
- Japan
- Prior art keywords
- buffer memory
- memory
- intermediate buffer
- request
- address
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
- G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58127610A JPS6020266A (ja) | 1983-07-15 | 1983-07-15 | メモリ制御方式 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58127610A JPS6020266A (ja) | 1983-07-15 | 1983-07-15 | メモリ制御方式 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6020266A true JPS6020266A (ja) | 1985-02-01 |
| JPH0450619B2 JPH0450619B2 (enExample) | 1992-08-14 |
Family
ID=14964339
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58127610A Granted JPS6020266A (ja) | 1983-07-15 | 1983-07-15 | メモリ制御方式 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6020266A (enExample) |
-
1983
- 1983-07-15 JP JP58127610A patent/JPS6020266A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0450619B2 (enExample) | 1992-08-14 |
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