JPS60201636A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS60201636A
JPS60201636A JP59059905A JP5990584A JPS60201636A JP S60201636 A JPS60201636 A JP S60201636A JP 59059905 A JP59059905 A JP 59059905A JP 5990584 A JP5990584 A JP 5990584A JP S60201636 A JPS60201636 A JP S60201636A
Authority
JP
Japan
Prior art keywords
oxide film
nitrogen
section
silicon substrate
implanted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59059905A
Other languages
Japanese (ja)
Inventor
Makoto Otake
誠 大竹
Shinji Sugaya
慎二 菅谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59059905A priority Critical patent/JPS60201636A/en
Publication of JPS60201636A publication Critical patent/JPS60201636A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate

Abstract

PURPOSE:To enable plural oxide films having different thicknesses to be formed simultaneously, by oxidizing a silicon wafer after previously implanting nitrogen into the surface of a section of the silicon wafer where a thinner oxide film is to be formed. CONSTITUTION:The surface of a silicon substrate is covered with a resist film 13 in a section (a). When nitrogen ions are implanted into the silicon substrate, no nitrogen penetrates into the section (a) while the section (b) is implanted with nitrogen atoms (n). The resist film is removed after completion of the ion implantation. The substrate is then thermal oxidized under certain conditions. A thin oxide film 14 is thereby formed on the surface of the section (b) where the rate of oxidation is controlled by the presence of nitrogen. On the surface of the section (a) where no nitrogen atoms are implanted, however, a thick oxide film 15 is formed according to the conditions in accordance with the temperature and the duration of the thermal oxidation.

Description

【発明の詳細な説明】 (a) 発明の技術分野 本発明は半導体装置の製造方法に係り、特に単一シリコ
ン基板表面に、同時に行う熱処理によって膜厚の異なる
複数のゲート酸化膜を形成する製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and in particular to a method for manufacturing a semiconductor device, in which a plurality of gate oxide films having different thicknesses are formed on the surface of a single silicon substrate by simultaneous heat treatment. Regarding the method.

(bl 技術の背景 近年、MO3半導体の絶縁膜のごとく、同一シリコン基
板表面に、要求される耐圧の相違のため異なる膜厚の酸
化膜を形成する構造を必要とする場合が多い。
Background of the Technology In recent years, it is often necessary to form oxide films of different thicknesses on the surface of the same silicon substrate, such as insulating films for MO3 semiconductors, due to the difference in required breakdown voltage.

(C) 従来技術と問題点 従来、このような場合の酸化膜の形成は、異なる膜厚毎
に熱処理条件を変えて酸化させるために、成膜厚を有す
る第1の酸化物をシリコン基板全体を熱処理等により生
成した後に、第1の酸化膜として残す部分をレジスト膜
で被覆し、第1の酸化膜と膜厚の異なる第2の酸化膜を
形成する部分は、第1の酸化膜があるために、その酸化
膜をエツチングで除去した後に、再度第2の酸化膜を形
成する酸化条件で再度熱処理を行っていた。
(C) Conventional technology and problems Conventionally, in order to form an oxide film in such cases, the first oxide film having a certain thickness is coated over the entire silicon substrate in order to oxidize the film by changing the heat treatment conditions for each film thickness. After the first oxide film is formed by heat treatment or the like, the part to be left as the first oxide film is covered with a resist film, and the part where the second oxide film having a different thickness from the first oxide film is to be formed is covered with the first oxide film. Therefore, after removing the oxide film by etching, heat treatment is performed again under oxidizing conditions to form a second oxide film.

このような製造工程では、製造が複雑になり、酸化膜厚
を形成する制御が困難になり、これの改善が要望されて
いる。
In such a manufacturing process, manufacturing becomes complicated and control of forming the oxide film thickness becomes difficult, and there is a desire to improve this.

第1図で従来の製造方法の概要を説明する。An outline of the conventional manufacturing method will be explained with reference to FIG.

第1図(11はシリコン基板1の表面に、フィールド酸
化物2があり、この両側に第1の酸化膜が形成されるべ
きa部分と、第2の酸化膜が形成されるべきb部分があ
るものとする。
Figure 1 (11 shows a field oxide 2 on the surface of a silicon substrate 1, on both sides of which there is a part a where a first oxide film is to be formed and a part b where a second oxide film is to be formed). Assume that there is.

第1図(2)はシリコン基板の熱処理を行って第1の酸
化物3を、a部とb部の双方に形成したもので、鹸化膜
の膜厚は規定の膜厚を得るように酸化装置で制御されて
形成される。
In Figure 1 (2), a silicon substrate is heat-treated to form the first oxide 3 on both parts a and b, and the saponified film is oxidized to a specified thickness. It is formed under the control of a device.

第1図(3)は、第1の酸化膜a部を残して、b部には
第2の酸化膜を形成するために、a部の第1の酸化膜の
表面をレジスト膜4で被覆して、これをエツチング液に
浸漬して、b部の第1の酸化膜の部分を除去し図である
In FIG. 1(3), the surface of the first oxide film in part a is covered with a resist film 4 in order to leave the first oxide film in part a and form a second oxide film in part b. This is then immersed in an etching solution to remove the first oxide film at section b.

第]131T41は、エツチングが完了して、レジスト
膜4を除去した後に、b部に第2の酸化膜を形成するた
めに再度シリコン基板を熱酸化処理して第2の酸化膜5
を形成した図である。
] 131T41, after the etching is completed and the resist film 4 is removed, the silicon substrate is thermally oxidized again to form a second oxide film on the b part.
FIG.

このような製造工程では多ぐの欠点があり、特に、第1
の酸化物を形成した後に、第2の酸化膜を形成する部分
がエツチングされるために、シリコン基板の表面が汚染
され、製造工程における清浄度が悪くなる。
There are many drawbacks to this manufacturing process, especially the first
After the second oxide is formed, the portion where the second oxide film is to be formed is etched, resulting in contamination of the surface of the silicon substrate and poor cleanliness during the manufacturing process.

又、シリコン基板を2回に渡って酸化するため、第1の
酸化膜が再度酸化雰囲気中で酸化されるので、第1の酸
化膜の膜厚を制御することが困難になる欠点がある。
Furthermore, since the silicon substrate is oxidized twice, the first oxide film is oxidized again in the oxidizing atmosphere, which makes it difficult to control the thickness of the first oxide film.

以上の欠点のため、シリコン基板の製造工程における品
質低下が避けられず、これを改善する製造方法が要望さ
れている。
Due to the above drawbacks, quality deterioration in the silicon substrate manufacturing process is unavoidable, and a manufacturing method that improves this is desired.

(d) 発明の目的 本発明は、上記従来の欠点に鑑み、単一のシリコンウェ
ハー表面に、同時に膜厚の異なる複数の酸化膜を形成す
る方法を提供することを目的とする。
(d) Purpose of the Invention In view of the above-mentioned conventional drawbacks, an object of the present invention is to provide a method for simultaneously forming a plurality of oxide films having different thicknesses on the surface of a single silicon wafer.

(e) 発明の構成 この目的は、単一シリコンウェハー表面に膜厚の異なる
酸化膜を形成するために、予め膜厚を薄く形成する上記
シリコンウェハー表面に、窒素をイオン注入した後、該
シリコンウェハーを酸化することにより、同時に厚さの
異なる酸化膜を形成することを特徴とする半導体装置の
製造方法を提供することによって達成できる。
(e) Structure of the Invention This object is to form oxide films of different thicknesses on the surface of a single silicon wafer. This can be achieved by providing a method for manufacturing a semiconductor device characterized by simultaneously forming oxide films of different thicknesses by oxidizing a wafer.

(f) 発明の実施例 本発明は、シリコン基板の表面に、窒素原子を注入する
ことにより、この部分ではシリコンの酸化速度が著しく
抑止されるという化学現象を利用して、同一シリコン基
板の表面に複数の膜厚の異なる部分を形成する際に、膜
厚の薄い部分には予め所定の窒素原子を注入しておき、
膜厚の厚い部分はそのままの状態にしておき、このシリ
コン基板を同一条件で同時に酸化処理することにより、
複数の膜厚の異なる酸化膜が形成され、これによって製
造工程の清浄化と熱処廟の簡素化が計られ、品質向上と
経済性の面で大きな効果がある。
(f) Embodiments of the Invention The present invention utilizes the chemical phenomenon that by implanting nitrogen atoms into the surface of a silicon substrate, the oxidation rate of silicon is significantly suppressed in this area. When forming multiple parts with different thicknesses, a predetermined amount of nitrogen atoms are injected into the thinner parts in advance.
By leaving the thicker parts as they are and simultaneously oxidizing the silicon substrate under the same conditions,
A plurality of oxide films with different thicknesses are formed, which helps to clean the manufacturing process and simplify the heat treatment process, which has great effects in terms of quality improvement and economic efficiency.

第2図は本発明の詳細な説明する薗であるが第1図の従
来例に準じて、フィールド酸化物の左右にそれぞれ異な
る膜厚のシリコン酸化膜を生成する場合を例にとって説
明する。
FIG. 2 is a detailed explanation of the present invention, and the explanation will be given by taking as an example a case where silicon oxide films having different thicknesses are formed on the left and right sides of a field oxide, in accordance with the conventional example shown in FIG.

第2図(1)において、シリコン基板11、その表面に
あるフィールド酸化物12の左側の表面aには膜厚の厚
い酸化膜を形成し、右側の表面すには膜厚の薄い酸化膜
を形成するものとする。
In FIG. 2(1), a thick oxide film is formed on the left surface a of the field oxide 12 on the silicon substrate 11, and a thin oxide film is formed on the right surface. shall be formed.

第2図(2)において、右側のbの部分の酸化を抑制す
るために、この部分に窒素のイオン注入を行うために、
シリコン基板のa部の表面を窒素のイオン注入を防止す
るために、シリコン基板のa部の表面をレジスト膜13
で被覆する。
In Fig. 2 (2), in order to suppress oxidation of the part b on the right side, nitrogen ions are implanted into this part.
In order to prevent nitrogen ion implantation into the surface of the part a of the silicon substrate, the surface of the part a of the silicon substrate is coated with a resist film 13.
Cover with

第2図(3)は、シリコン基板に、窒素のイオン注入を
行っている図であるが、レジスト膜で被覆されたa部に
は窒素の浸入がなく、b部には点線で示す窒素原子nが
注入され、イオン注入が完了するとレジスト膜は除去さ
れる。
Figure 2 (3) is a diagram showing nitrogen ions being implanted into a silicon substrate, but no nitrogen has penetrated into part a, which is covered with a resist film, and nitrogen atoms are shown by dotted lines in part b. After n is implanted and the ion implantation is completed, the resist film is removed.

第2図(4)は、シリコン基板を所定の条件で熱酸化を
行った後の酸化膜を示す図であり、窒素原子が注入され
たb部の表面は窒素によって酸化の生成速度が抑制され
て、薄い酸化膜14が形成され、反対に窒素原子がイオ
ン注入されていないa部分には、厚い酸化膜15が熱酸
化の温度、時間に対応した条件によって形成される。
FIG. 2 (4) is a diagram showing an oxide film after thermally oxidizing a silicon substrate under predetermined conditions, and the surface of part b where nitrogen atoms are implanted has a rate of oxidation suppressed by nitrogen. A thin oxide film 14 is formed, and on the other hand, a thick oxide film 15 is formed in a portion a where nitrogen atoms are not ion-implanted under conditions corresponding to the temperature and time of thermal oxidation.

通常、窒素原子のイオン注入の電圧は50KeV乃至1
50KeV程度であって、イオン注入原子は、厳密に制
御することができ、注入量によって酸化レートを容易に
加減することが可能である。
Usually, the voltage for ion implantation of nitrogen atoms is 50 KeV to 1
At about 50 KeV, the ion-implanted atoms can be strictly controlled, and the oxidation rate can be easily adjusted by adjusting the implantation amount.

このように、シリコン基板の表面に窒素をイオン注入す
ることによって、シリコン基板の表面の任意の位置に、
酸化レートの異なる複数の表面を設けることができ、又
製造工程が簡素化され、且つ窒素の注入量を制御するこ
とにより、シリコン基板表面の所望の位置に膜厚の異な
る酸化膜を同時に形成することが可能になるため、シリ
コン基板を処理するウエソト工程のない清浄な製造工程
となり、叉窒素の注入量によって所望の膜厚が得られる
ため、半導体装置の品質向上と製造工程の効率化面で効
果が大きい。
In this way, by implanting nitrogen ions into the surface of the silicon substrate,
Multiple surfaces with different oxidation rates can be provided, the manufacturing process is simplified, and by controlling the amount of nitrogen implanted, oxide films with different thicknesses can be simultaneously formed at desired positions on the silicon substrate surface. This makes it possible to create a clean manufacturing process that does not require a wet process for processing silicon substrates, and the desired film thickness can be obtained by adjusting the amount of nitrogen implanted, which contributes to improving the quality of semiconductor devices and increasing the efficiency of the manufacturing process. Great effect.

(gl 発明の効果 以上詳細に説明したように、本発明の製造方法を採用す
ることにより、半導体装置の品質向上と製造工程の効率
化による経済性の両面に供しうるという効果大なるもの
がある。
(gl Effects of the Invention As explained in detail above, by adopting the manufacturing method of the present invention, there is a great effect in that it can improve the quality of semiconductor devices and improve the efficiency of the manufacturing process, resulting in economic efficiency. .

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の製造方法を説明する図。 第2図は本発明は製造方法を説明する図。 図において、11はシリコン基板、12はフィールド酸
化物、13はレジスト膜、14は薄い酸化膜、15は厚
い酸化膜である。 図面の浄書(内容に変更なし) 第1図 第2図 手続補正書(方力 昭和59年 7月λ6日 2、発明の名称 事件との関係 特許出願人 住所 神奈川県用崎市中原区上小田中1015番地(5
22)名称冨士通株式会社 4、代理人 住所 神奈川県川崎市中原区上小田中1015番地富士
通株式会社内 暑 」肘 5、補正命令の日付 昭和59年 6月 6日 (1) 明細書第7頁16行及び17行の「第1図は・
・・・・製造方法を説明する図。」を次のとおり補正す
る。 「第1図(11乃至第1図(4)は従来の製造工程を順
次説明するための断面図。第2図(11乃至第2図(4
)は本発明の製造工程を順次説明するための断面図であ
る。」 (2)図面を別紙の補正図面の通り訂正する。 9、添付書類の目録 補正図面 1通 以上
FIG. 1 is a diagram explaining a conventional manufacturing method. FIG. 2 is a diagram explaining the manufacturing method of the present invention. In the figure, 11 is a silicon substrate, 12 is a field oxide, 13 is a resist film, 14 is a thin oxide film, and 15 is a thick oxide film. Engraving of the drawings (no change in content) Figure 1 Figure 2 Procedural amendment (Horiki July 6, 1982, 2, Relationship to the title of invention case Patent applicant address Kamiodanaka, Nakahara-ku, Yozaki City, Kanagawa Prefecture) Address 1015 (5
22) Name: Fujitsu Co., Ltd. 4, Agent Address: 1015 Kamiodanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture Fujitsu Co., Ltd. Uchisatsu 5, Date of Amendment Order: June 6, 1980 (1) Page 7 of the Specification In lines 16 and 17, “Figure 1 is...
...A diagram explaining the manufacturing method. ' shall be amended as follows. "Figure 1 (11 to Figure 1 (4)) are cross-sectional views for sequentially explaining the conventional manufacturing process. Figure 2 (11 to Figure 2 (4)
) are sectional views for sequentially explaining the manufacturing process of the present invention. (2) Correct the drawing as shown in the attached amended drawing. 9. One or more copies of the catalog correction drawings for attached documents

Claims (1)

【特許請求の範囲】[Claims] 単一シリコン基板表面に膜厚の異なる酸化膜を同時に形
成するために、予め膜厚を薄く形成する上記シリコン基
板表面に、窒素をイオン注入した後、該シリコン基板を
酸化することにより、同時に膜厚の異なる酸化膜を形成
することを特徴とする半導体装置の製造方法。
In order to simultaneously form oxide films with different thicknesses on the surface of a single silicon substrate, nitrogen ions are implanted into the silicon substrate surface, which is previously formed to a thin film thickness, and then the silicon substrate is oxidized to simultaneously form oxide films. A method for manufacturing a semiconductor device, comprising forming oxide films having different thicknesses.
JP59059905A 1984-03-27 1984-03-27 Manufacture of semiconductor device Pending JPS60201636A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59059905A JPS60201636A (en) 1984-03-27 1984-03-27 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59059905A JPS60201636A (en) 1984-03-27 1984-03-27 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS60201636A true JPS60201636A (en) 1985-10-12

Family

ID=13126601

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59059905A Pending JPS60201636A (en) 1984-03-27 1984-03-27 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS60201636A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08228000A (en) * 1994-07-30 1996-09-03 Lg Semicon Co Ltd Semiconductor device and manufacture thereof
DE19839079C2 (en) * 1998-02-27 2002-08-01 Lg Semicon Co Ltd Method of manufacturing an insulating layer and structure of an insulating layer for a semiconductor device
KR100415629B1 (en) * 2001-08-28 2004-01-24 프로모스 테크놀로지즈 인코포레이티드 Method for molecular nitrogen implantation dosage monitoring

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08228000A (en) * 1994-07-30 1996-09-03 Lg Semicon Co Ltd Semiconductor device and manufacture thereof
DE19839079C2 (en) * 1998-02-27 2002-08-01 Lg Semicon Co Ltd Method of manufacturing an insulating layer and structure of an insulating layer for a semiconductor device
KR100415629B1 (en) * 2001-08-28 2004-01-24 프로모스 테크놀로지즈 인코포레이티드 Method for molecular nitrogen implantation dosage monitoring

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