JPS60190053U - Hybrid integrated circuit device - Google Patents
Hybrid integrated circuit deviceInfo
- Publication number
- JPS60190053U JPS60190053U JP7851584U JP7851584U JPS60190053U JP S60190053 U JPS60190053 U JP S60190053U JP 7851584 U JP7851584 U JP 7851584U JP 7851584 U JP7851584 U JP 7851584U JP S60190053 U JPS60190053 U JP S60190053U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- hybrid integrated
- circuit device
- semiconductor
- hybrid
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来のこの種の混成集積回路装置を示す説明図
、第２図は本考案の一実施例を示す説明図である。
１・・・基板、２・・・膜集積回路、３・・・素子チッ
プ、４・・・半導体集積回路、５・・・個別部品、６・
・・凹部。FIG. 1 is an explanatory diagram showing a conventional hybrid integrated circuit device of this type, and FIG. 2 is an explanatory diagram showing an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Substrate, 2... Film integrated circuit, 3... Element chip, 4... Semiconductor integrated circuit, 5... Individual components, 6...
・Concavity.
Claims (1)
構成する混成集積回路において、基板に当該半導体集積
回路の形状に合わせて設けた凹部に埋め込み端子を膜集
積回路の所定の電極に半田付けした半導体集積回路を備
えたことを特徴、とする混成集積回路装置。In a hybrid integrated circuit configured by attaching individual components and a semiconductor integrated circuit to a membrane integrated circuit, a semiconductor in which a terminal is embedded in a recess formed on a substrate to match the shape of the semiconductor integrated circuit and soldered to a predetermined electrode of the membrane integrated circuit. A hybrid integrated circuit device characterized by comprising an integrated circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7851584U JPS60190053U (en) | 1984-05-28 | 1984-05-28 | Hybrid integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7851584U JPS60190053U (en) | 1984-05-28 | 1984-05-28 | Hybrid integrated circuit device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60190053U true JPS60190053U (en) | 1985-12-16 |
Family
ID=30622565
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7851584U Pending JPS60190053U (en) | 1984-05-28 | 1984-05-28 | Hybrid integrated circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60190053U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5932191A (en) * | 1982-08-18 | 1984-02-21 | イビデン株式会社 | Printed circuit board and method of producing same |
-
1984
- 1984-05-28 JP JP7851584U patent/JPS60190053U/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5932191A (en) * | 1982-08-18 | 1984-02-21 | イビデン株式会社 | Printed circuit board and method of producing same |
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