JPS60188383U - Multi-input period measuring device - Google Patents
Multi-input period measuring deviceInfo
- Publication number
- JPS60188383U JPS60188383U JP7652484U JP7652484U JPS60188383U JP S60188383 U JPS60188383 U JP S60188383U JP 7652484 U JP7652484 U JP 7652484U JP 7652484 U JP7652484 U JP 7652484U JP S60188383 U JPS60188383 U JP S60188383U
- Authority
- JP
- Japan
- Prior art keywords
- gate
- input
- counter
- clock
- gate control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Measuring Frequencies, Analyzing Spectra (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本考案の一実施例を示す７゛旧ラック、第２図
は従来の装置の一例を示すブロック図、第一３図は測定
時間関係例図である。 −ＩＮ・・・入力端子
、ＭＴＸ・・・入力選択回路、ＯＣＡ、 ５Ｇ
ＣＢ・・・ゲート制御回路、ＧＴ・・・ゲート、ＣＬＫ
・・・りｄツク源、カウンター・・ＣＴＲ，ＣＴＣ・・
・カウンタ制６１″Ｉｊ！、、ＤＳ−７’二１７回“・
−第２図 ７
第３図FIG. 1 is a 7" old rack showing an embodiment of the present invention, FIG. 2 is a block diagram showing an example of a conventional device, and FIG. 13 is an example of measurement time relationship. -IN...Input terminal, MTX...Input selection circuit, OCA, 5G
CB...Gate control circuit, GT...Gate, CLK
...Ridtsuk source, counter...CTR, CTC...
・Counter system 61″Ij!,,DS-7′217 times“・
-Figure 2 7 Figure 3
Claims (1)
力信号を選択的に送出する入力選択回路と、入力選択回
路から送出奈れる所定の入力信号に従って各ゲートを開
閉するゲート制御信号を送° 出する複数のゲート制御
回路と、共通のクロック源からそれぞれクロックが加え
られ各ゲート制御、 回路から加えられるゲート制御
信号に従って所定、 の時間クロックを通過させる複
数のゲートと、各ゲートを介して加えられるクロックを
計数する複数の力？ンタと、各カウンタの計数動作を制
御す］ るカウンタ制御回路とで構成されたことを特徴
とする゛多入力周期測定装置。 、An input selection circuit selectively sends a predetermined input signal corresponding to m- of each gate from a plurality of input signals, and a gate control signal that opens and closes each gate according to the predetermined input signal sent from the input selection circuit. ° A plurality of gate control circuits that output a clock from a common clock source, each gate control circuit receiving a clock from a common clock source, a plurality of gates that pass a clock for a predetermined time according to a gate control signal applied from the circuit, and a plurality of gates through each gate. Multiple forces counting clocks applied? 1. A multi-input period measuring device comprising: a counter; and a counter control circuit that controls the counting operation of each counter. ,
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7652484U JPS60188383U (en) | 1984-05-24 | 1984-05-24 | Multi-input period measuring device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7652484U JPS60188383U (en) | 1984-05-24 | 1984-05-24 | Multi-input period measuring device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60188383U true JPS60188383U (en) | 1985-12-13 |
Family
ID=30618745
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7652484U Pending JPS60188383U (en) | 1984-05-24 | 1984-05-24 | Multi-input period measuring device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60188383U (en) |
-
1984
- 1984-05-24 JP JP7652484U patent/JPS60188383U/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS60188383U (en) | Multi-input period measuring device | |
| JPS59119644U (en) | Gate array IC | |
| JPS6115836U (en) | Human signal selection circuit | |
| JPS59117974U (en) | Measurement mode switching circuit | |
| JPS5877943U (en) | Multi-point sampling circuit | |
| JPS601037U (en) | binary circuit | |
| JPS6133547U (en) | data transfer device | |
| JPS6119860U (en) | External signal counting device | |
| JPS5827777U (en) | Delay time measurement circuit | |
| JPS582039U (en) | clock receiver circuit | |
| JPS6059686U (en) | signal monitoring circuit | |
| JPS6076443U (en) | magnetic disk device | |
| JPS6427724U (en) | ||
| JPS6039139U (en) | Magnetic card reader interface circuit | |
| JPS5884589U (en) | Integrated circuit for all-electronic watches | |
| JPS60169960U (en) | Clock signal extraction circuit | |
| JPS60124175U (en) | Main clock device of electronic exchange | |
| JPS58191769U (en) | Synchronous signal switching circuit | |
| JPS60180139U (en) | counting circuit | |
| JPS611932U (en) | Frequency divider circuit | |
| JPS60158332U (en) | reset circuit | |
| JPS60123093U (en) | alarm control device | |
| JPS6032839U (en) | A/D conversion accuracy check circuit | |
| JPS6020654U (en) | microprocessor interrupt circuit | |
| JPS59177240U (en) | Output circuit |