JPS60186753U - Image input processing device - Google Patents
Image input processing deviceInfo
- Publication number
- JPS60186753U JPS60186753U JP7307984U JP7307984U JPS60186753U JP S60186753 U JPS60186753 U JP S60186753U JP 7307984 U JP7307984 U JP 7307984U JP 7307984 U JP7307984 U JP 7307984U JP S60186753 U JPS60186753 U JP S60186753U
- Authority
- JP
- Japan
- Prior art keywords
- image data
- processing device
- input processing
- image input
- scanning direction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Image Processing (AREA)
- Editing Of Facsimile Originals (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本考案の１実施例による回路図で、ある。
図中符号、１・・・入力画像処理装置、２・・・ＦｉＦ
ｏバッファ、３・・・Ｄ型フリップフロップ、４・・・
ＡＮＤ回路、５・・・デイナミツクシフトレジスタ、２
６・・・データセレクタ、７・・・入力画像データ、８
・・・書き込みクロック、９・・・読み出しクロック、
１０・・・読み出しクロックマスクデータ、１１・・・
出力画像データ。FIG. 1 is a circuit diagram according to an embodiment of the present invention. Symbols in the figure: 1... Input image processing device, 2... FiF
o buffer, 3...D type flip-flop, 4...
AND circuit, 5... dynamic shift register, 2
6...Data selector, 7...Input image data, 8
...Write clock, 9...Read clock,
10...Read clock mask data, 11...
Output image data.
Claims (1)
備え、前記入力画像データが読み出しクロックにより主
走査方向及び副走査方向に読み出−される画像入力処理
装置において、前記読み出しクロックをマスキングする
手段と、そのマスキングされた読み出しクロックにより
読み出される１ライン分の同一画像データを重複して出
力する手段とを有し、各走査方向に拡大倍率に相当する
回数マスキングして画像データ出力を行い入力画像デー
タを拡大出力することを特徴子する画像入力処理装置。An image input processing device comprising a buffer memory capable of storing one line of image data, and in which the input image data is read out in the main scanning direction and the sub-scanning direction using a readout clock, comprising: means for masking the readout clock; It has a means for duplicating one line of the same image data read out by the masked readout clock, and outputs the image data by masking it a number of times corresponding to the enlargement magnification in each scanning direction, and input image data. An image input processing device that features enlarged output.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7307984U JPS60186753U (en) | 1984-05-21 | 1984-05-21 | Image input processing device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7307984U JPS60186753U (en) | 1984-05-21 | 1984-05-21 | Image input processing device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60186753U true JPS60186753U (en) | 1985-12-11 |
Family
ID=30612100
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7307984U Pending JPS60186753U (en) | 1984-05-21 | 1984-05-21 | Image input processing device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60186753U (en) |
-
1984
- 1984-05-21 JP JP7307984U patent/JPS60186753U/en active Pending
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