JPS60184096U - frequency modulator - Google Patents

frequency modulator

Info

Publication number
JPS60184096U
JPS60184096U JP7290984U JP7290984U JPS60184096U JP S60184096 U JPS60184096 U JP S60184096U JP 7290984 U JP7290984 U JP 7290984U JP 7290984 U JP7290984 U JP 7290984U JP S60184096 U JPS60184096 U JP S60184096U
Authority
JP
Japan
Prior art keywords
charge transfer
clock pulse
transfer element
supplied
output signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7290984U
Other languages
Japanese (ja)
Inventor
隆 上村
Original Assignee
日本ビクター株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本ビクター株式会社 filed Critical 日本ビクター株式会社
Priority to JP7290984U priority Critical patent/JPS60184096U/en
Publication of JPS60184096U publication Critical patent/JPS60184096U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

゛第1図は本考案を適用した周波数変調装置の一実施例
の電気的構成を示すブロック系統図、第2図は第1図に
示した周波数変調器の動作を示すタイムチャート、第3
図は同じく第1図に示した周波数変調装置を用いた効果
音発生器の電気的構成を示すブロック系統図である。 1・・・第1のBBD、 2・・・第2のBBD、 3
・・・第1のパルス発生器、4・・・第2のパルス発生
器、5・・・制御回路、6・・・入力端子、7・・・出
力端子、20・・・周波数変調装置。
゛Fig. 1 is a block system diagram showing the electrical configuration of an embodiment of a frequency modulator to which the present invention is applied; Fig. 2 is a time chart showing the operation of the frequency modulator shown in Fig. 1;
This figure is a block system diagram showing the electrical configuration of a sound effect generator using the frequency modulation device shown in FIG. 1. 1...First BBD, 2...Second BBD, 3
... first pulse generator, 4 ... second pulse generator, 5 ... control circuit, 6 ... input terminal, 7 ... output terminal, 20 ... frequency modulation device.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 所定周波数の第1のクロックパルスを出力する第1のパ
ルス発生器と、上記第1のクロックパルスと異なる周波
数の第2のクロックパルスを出力する第2のパルス発生
器と、上記第1及び第2のクロックパルスにて駆動され
る第1の電荷転送素子と、同じく上記第1及び第2のク
ロックパルス゛   にて駆動される第2の電荷転送素
子と、一定期間毎に信号ラインを切換えることにより上
記第1の電荷転送素子には上記第1のクロックパルスを
供給し上記第2の電荷転送素子には上記第2のクロッグ
ペルスを供給するとともにこの第2の電荷転送素子の出
力信号を自己帰還させつつ出力端子を介して出力させる
状態と上記第1の電荷転送素子には上記第2のクロック
パルスを供給し上記第2の電荷転送素子には上記第1の
クロックパルスを供給するとともに上記第1の電荷転送
素子の出力信号を自己帰還させつつ上記出力端子を介し
て出力させる状態とを上記一定期間毎に切換える制御回
路とを備え、上記第1及び第2の電荷転送素子のうちい
ずれかか一方の電荷転送素子が上記第2のクロックパル
スに同期して自己帰還させつつ出力する出力信号を他方
の電荷転送素子に上記第1のクロックパルスと同期させ
て読み込ませることを特徴とした周波数変調装置。
a first pulse generator that outputs a first clock pulse with a predetermined frequency; a second pulse generator that outputs a second clock pulse with a frequency different from the first clock pulse; The first charge transfer element is driven by the second clock pulse, and the second charge transfer element is also driven by the first and second clock pulses, and the signal line is switched at regular intervals. The first clock pulse is supplied to the first charge transfer element, the second clock pulse is supplied to the second charge transfer element, and the output signal of the second charge transfer element is self-feedback. the second clock pulse is supplied to the first charge transfer element, the first clock pulse is supplied to the second charge transfer element, and the second clock pulse is supplied to the second charge transfer element, and a control circuit that switches between a state in which the output signal of the first charge transfer device is self-feedback and outputted through the output terminal at each of the fixed periods; A frequency characterized in that one of the charge transfer elements outputs an output signal while performing self-feedback in synchronization with the second clock pulse, and the output signal is read into the other charge transfer element in synchronization with the first clock pulse. Modulator.
JP7290984U 1984-05-18 1984-05-18 frequency modulator Pending JPS60184096U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7290984U JPS60184096U (en) 1984-05-18 1984-05-18 frequency modulator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7290984U JPS60184096U (en) 1984-05-18 1984-05-18 frequency modulator

Publications (1)

Publication Number Publication Date
JPS60184096U true JPS60184096U (en) 1985-12-06

Family

ID=30611770

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7290984U Pending JPS60184096U (en) 1984-05-18 1984-05-18 frequency modulator

Country Status (1)

Country Link
JP (1) JPS60184096U (en)

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