JPS60182808A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To attain stable operation by providing MOS transistors (TR) of one conduction type respectively connected to the 1st and 2nd MOS TRs of one conduction type whose sources are connected in common as loads. CONSTITUTION:N-channel MOS TRs 6, 7 are connected between outputs 1, 2 and a power supply V and each gate is connected to common. Supose that a level of the output 2 is decreased to a level of (power level - VTN) due to variation of TRs, the TR7 at the output side 2 of the TRs 6, 7 is conductive, the capability as a load is increased equivalently, the on-resistance is decreased and the reduction of a level VB at a connecting point B is prevented, then a level difference between the input 1 and the level VB of the connecting point B is lower than a threshold voltage VTNof the TR2, and the TR2 keeps the off- state. Thus, even if the capability of the TRs is in variation, the circuit is operated normally without incurring the decrease in the level difference between the outputs 1 and 2 and inversion.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to the configuration of a differential amplifier using complementary MOS transistors.

(Background of the invention) In recent years, with the increase in the scale of integrated circuits, increased power consumption has become a problem, and complementary MO8)? Focusing on the low power consumption of transistor circuits, the application of complementary MO8) transistor circuits to various integrated circuits is progressing.However, there are two types of complementary MO8) transistor circuits.
OS) transistors, i.e. P channel type and N
It is necessary to use a channel type MOS transistor. Even if these elements are integrated on the same substrate, some of the parameters that determine their characteristics (threshold voltage, current supply capacity, etc.) are independent, so in terms of performance ratio, only MOS transistors on the same channel There are disadvantages such as greater variation compared to those using
This causes difficulty in designing differential amplifiers, etc.

(Object of the Invention) An object of the present invention is to improve the difficulty in designing such a differential amplifier.

(Structure of the Invention) According to the present invention, first and second M08 transistors of one conductivity type whose source electrodes are commonly connected to each other, and a transistor connected to each of the first and second MOS transistors as a load are provided. Obtaining a semiconductor integrated circuit equipped with a differential amplifier having first and second loads made of a parallel connection of MOS transistors of one conductivity type. Next, the present invention will be described in more detail with reference to the drawings. explain.

(Prior Art) First, an example of a differential amplifier using complementary MO8 transistors in a conventional semiconductor integrated circuit will be described with reference to FIG. As a constant current source, an N-channel MOS transistor 1 whose gate is connected to a power supply 1 is used. The source of this MOS transistor 1 is grounded, and the drain is an N-channel type/MOS transistor 2.3 whose gate is connected to input 1 and input 2, respectively.
The sources of these MOS) transistors 2.3
The sources of P-channel MO8 transistors 4.5 whose gates are grounded are connected as loads to the drains of the transistors. The source of the MO811 transistor 1 is grounded, and the drains of the MO811 transistors 4 and 5 are connected to a power supply V.

Output 1° and output 2 are taken out from the connection point between MOS transistors 2 and 4 and the connection point between MOS transistors 3 and 5, respectively.

Now, for the purpose of explanation, the threshold voltage of the transistor (P-channel type and N-channel type MOS) is t'LVTp.
e VTN% Also MO8)')nsisfi 1,
Let the potential of point B, which is the connection point of 2.3, be V. input l
It is assumed that a low-level input voltage is applied to 2, and a high-level input voltage is applied to human power 2. Since the human power l is at a low level, MOS) transistor 2 is turned off, and M
Since the resistance between the drain and source of the OS transistor 2 approaches infinity, the output l becomes approximately the power supply level ■.

On the other hand, since a low-level input terminal is given to input 2, MOS transistor 3 is turned on, and the output 20 level is a low-level output determined by the ratio of the on-resistances of transistors 1, 3, and 5. value.

Here, due to causes such as variations in MOS transistors, the current supply capabilities of N-channel type MOS transistors 1, 2, and 3 become large, and their threshold voltages VTN become small. 5
As the current supply capability of VTP decreases, their threshold voltage VTP
When becomes large, the level VB at point B decreases. At this time, for some reason, the low level side of the differential input signal becomes lower than the power supply potential V
When K approaches and (VB + VTN) Yoshi also becomes large,
If both N-channel type MOS) transistors 2 and 3 become conductive, the voltage level of output 1, which should output a high-level output, decreases, and the level difference between the output voltages of outputs 1 and 2 decreases. This causes a reverse rotation and normal operation becomes impossible.

(Example of the invention) Examples of the present invention will be shown and explained below.

FIG. 2 shows an embodiment of the present invention. In FIG. 2, the same symbols and reference numerals are used for the same parts as in FIG. 1. An N-channel MO8O8 transistor 7 is further connected between the outputs 1 and 2 and the power supply V. The gates of these MOS transistors 7 are grounded.

Now, output 2 due to variations in MO811 register etc.
MOS) on the side becomes conductive, increases the capacity as a load isometrically, reduces the on-resistance, and prevents the level VB of the connection point B from decreasing, thereby reducing the difference between the input 1 and the level of the connection point B 1. The level difference becomes less than the threshold voltage VT)J of the MO8 transistor 20, and the MOS) transistor 2 remains in the off state. In this way, even if the capabilities of the MOS transistors vary, normal operation can be achieved without reducing the level difference between the outputs 1 and 2 or causing a reversal.

As described above, by using the present invention, a stable differential amplifier using complementary MOS transistors can be provided.

Also, in this application, the input MO8 transistor and the MOS) transistor as a current source have been explained using an N-channel type MOS) transistor, but a P-channel type MOS) transistor is used.
It is obvious that an S transistor can be used. In addition, although the explanation has been made by applying the power supply voltage as the gate voltage of transistor 1 (MOS) as a current source, MOB
Controlling the signal applied to the gate of transistor 1
It is also possible to make changes such as consuming power only during operation.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing a differential amplifier using conventional complementary MOS transistors, and FIG. 2 is a circuit diagram showing an embodiment of the present invention. 4.5...P channel type MO8)? transistor, 1.2, 3, 6.7...N channel type MO
S transistor, B... Connection point, ■...
·power supply.

Claims (1)

[Claims] a differential amplifier operating section in which the sources of two MOS transistors of one conductivity type are connected to each other; and the MOS transistor of the -conductivity type;
A semiconductor integrated circuit comprising a load section of the differential amplifier having a structure in which a transistor and a MOS transistor of another conductivity type are connected in parallel.