JPS60181947U - Receive carrier detection circuit - Google Patents
Receive carrier detection circuitInfo
- Publication number
- JPS60181947U JPS60181947U JP6857684U JP6857684U JPS60181947U JP S60181947 U JPS60181947 U JP S60181947U JP 6857684 U JP6857684 U JP 6857684U JP 6857684 U JP6857684 U JP 6857684U JP S60181947 U JPS60181947 U JP S60181947U
- Authority
- JP
- Japan
- Prior art keywords
- clock
- detection circuit
- carrier detection
- received
- receive carrier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Dc Digital Transmission (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来の受信キャリヤ検出回路の一例を示すブロ
ック図、第2図および第3図はそれぞれ本考案の受信キ
ャリヤ検出回路の第1および第2の実施例を示すブロッ
ク図である。
図において、1・・・・・・微分回路、2・・・・・−
LCタンク回路−13・・・・・・波形成形回路、4・
・・・・・整流回路、5・・・・・・増幅器、6・・・
・・・コンパレータ、101・・・・・・クロック発生
回路、102〜105,111,211・・・・・・フ
リップフロップ、106・・・・・・遅延素子、107
,213・・・・・・インバータ素子、108.208
,210・・・・・・ナンド素子、109,212・・
・・・・カウンタ、110・・・・・・3人カナンド素
子。FIG. 1 is a block diagram showing an example of a conventional received carrier detection circuit, and FIGS. 2 and 3 are block diagrams showing first and second embodiments of the received carrier detection circuit of the present invention, respectively. In the figure, 1...differential circuit, 2...-
LC tank circuit-13... Waveform shaping circuit, 4.
... Rectifier circuit, 5 ... Amplifier, 6 ...
... Comparator, 101 ... Clock generation circuit, 102 to 105, 111, 211 ... Flip-flop, 106 ... Delay element, 107
, 213...Inverter element, 108.208
, 210... NAND element, 109, 212...
...Counter, 110...3 people canand element.
Claims (1)
るデータ伝送装置において、前記クロックのパルス数を
定められた値Nまでカウントした後その旨を表示する表
示信号を出力するとともにリセット信号が入力されるま
でカウント動作を停止するカウンタと、受信すべきデー
タ信号のビット周期の整数倍かつ前記値NU上の倍数で
前記クロックとは同期しない内部クロックを発生する内
部クロック発生回路と、前記カウンタからの前記表示信
号を入力とするフリップフロップとを備えることを特徴
とする受信キャリヤ検出回路。In a data transmission device that operates by extracting a clock component from a received data signal, after counting the number of pulses of the clock up to a predetermined value N, a display signal indicating this is outputted and a reset signal is inputted. an internal clock generating circuit that generates an internal clock that is an integer multiple of the bit period of the data signal to be received and a multiple of the value NU and is not synchronized with the clock; A received carrier detection circuit comprising a flip-flop that receives a display signal as an input.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6857684U JPS60181947U (en) | 1984-05-11 | 1984-05-11 | Receive carrier detection circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6857684U JPS60181947U (en) | 1984-05-11 | 1984-05-11 | Receive carrier detection circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60181947U true JPS60181947U (en) | 1985-12-03 |
JPH0311977Y2 JPH0311977Y2 (en) | 1991-03-22 |
Family
ID=30603449
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6857684U Granted JPS60181947U (en) | 1984-05-11 | 1984-05-11 | Receive carrier detection circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60181947U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008131091A (en) * | 2006-11-16 | 2008-06-05 | Mitsubishi Electric Corp | Status information communication system |
-
1984
- 1984-05-11 JP JP6857684U patent/JPS60181947U/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008131091A (en) * | 2006-11-16 | 2008-06-05 | Mitsubishi Electric Corp | Status information communication system |
Also Published As
Publication number | Publication date |
---|---|
JPH0311977Y2 (en) | 1991-03-22 |
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