JPS60181861A - Data setting system - Google Patents

Abstract

PURPOSE:To make quick restoration from malfunction and efficient data setting possible by providing a counter, which is counted up by every one processing cycle, in a digital signal processing device and storing data, which is read out from a ROM with the counted value as the address, in a RAM with the same counted value as the address. CONSTITUTION:A counter 2 in a digital signal processing circuit 1 is counted up by every one processing cycle, and the counted value is used as the address to read out set data from a ROM5, and this data is transferred to the digital signal processing circuit 1. Meanwhile, data transferred from a set data output circuit 4 is stored in a RAM in accordance with the address designated by the counter 2. Since one word of data is transferred in one processing cycle, the time spent in data transfer is short, and a processing time t2 is extended. Since data is transferred in every processing cycle, all data is written in the RAM in N-number of cycles if the number of data to be transferred is N, and data is corrected to correct data after N-number of cycles even in case of data error.

Description

[Detailed Description of the Invention] Technical Field of the Invention The present invention relates to a method of setting data in a read/write memory (hereinafter referred to as RAM) in a digital signal processing device, etc., and particularly relates to a method for efficiently transferring a large amount of data to RAM'M. This relates to the data setting power r' that can be set.

Technical background In digital signal processing equipment, data is transferred to an external R
Rather than reading data from OM and processing it every time it is needed, it is advantageous in terms of reducing processing time to write the data in advance to the RAM in the processing device and then read it and process it. many. In this case, due to the nature of the RAM, there is a possibility that the data value may change due to some kind of malfunction, and it is necessary to promptly correct the erroneous data to correct data.

Conventional technology and problems RA of large amount of data that goes into digital signal processing circuit
Conventionally, methods for setting M include a method of initial setting and a method of setting for each processing cycle.

FIG. 1 shows a processing cycle table according to a conventional data setting method. In the figure, +al indicates a method in which only initial settings are performed, and no data is set except for the initial setting. fbl indicates a method of setting data for each processing cycle, in which all data is set for each processing cycle, and the remaining period 1.fbl of each processing cycle is set. This is the processing period in which the necessary processing is completed.

However, in the method of setting data through initial settings, if an error occurs in the RAM, there is no opportunity to correct the displayed data, and it is impossible to recover from the malfunction state. Furthermore, the method of setting a large amount of data for each processing cycle requires a large amount of time to transfer the data, resulting in a problem that the processing time is shortened and the processing capacity is reduced.

OBJECT OF THE INVENTION The present invention attempts to solve the problems of the prior art, and its purpose is to store large amounts of data in RAM.
It is an object of the present invention to provide a data setting force formula that can quickly recover from a malfunction and efficiently set data when setting the data.

Structure of the Invention The data setting method of the present invention is based on the RO of the external data setting circuit.
In a data setting method in which data read from M is transferred to a digital signal processing device and set in that RAM,
A digital signal processing device is provided with a counter that counts up every processing cycle, and the data read word by word from the ROM using the count value of this counter as an address is stored in the RAM using the same count value as an address. It is.

Embodiment of the Invention FIG. 2 shows the configuration of an embodiment of the data setting system of the invention. In the figure, l is a digital signal processing circuit, and counters 2 . It has RAM3. 4 is a setting data output circuit, which is a read-only memory (hereinafter referred to as RO
5).

In FIG. 2, a counter 2 in the digital signal processing circuit 1 counts up every processing cycle and notifies the setting data output circuit 4 of the count value as an address. The setting data output circuit 4 reads setting data from the ROM 5 according to this address, and this data is transferred to the digital signal processing circuit 1. On the other hand, counter 2
The count value is given to the RAM 3 as an address, and the data transferred from the setting data output circuit 4 is stored in the RAM 3 according to the address specified by the counter 2.

In this manner, the setting data output circuit 4 transfers the setting data to the RAM in each processing cycle.

Counter 2 is cleared after counting the total number of words of data that should be set, and does not repeat the counting from address Abi 110.

FIG. 3 shows an example of a processing cycle table in the data setting method of the present invention. As shown in the figure, after initialization is first performed, data is transferred one word at a time from address 0 to address 11, -, etc. every processing cycle. In the method of the present invention, only one word of data is transferred in one processing cycle, so the time required for data transfer is shorter than in the case of FIG. The processing time t2 for each cycle can be made longer than in the case of FIG. If this is the case, all data can be written to the RAM in N cycles.In other words, even if some data in the RAM is incorrect, it can be corrected to the original correct data after N cycles, and the malfunction can be recovered.

Effects of the Invention - As explained above, according to the data setting method of the present invention, in the data setting method in which data read from the ROM of the external data setting circuit is transferred to the digital signal processing device and set in the RAM thereof, the digital signal 1 for processing equipment
A counter that counts up every processing cycle is provided, and the count value of this counter is used as an address to read 1 from the ROM.
Since the data read word by word is stored in RAM using the same callan 1-value as the address, when setting a large amount of data in RAM, it is possible to quickly recover from a malfunction and efficiently. Can set data

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a processing cycle table in the conventional data setting method, FIG. 2 is a diagram showing the configuration of an embodiment of the data setting method of the present invention, and FIG. 3 is a diagram showing the processing cycle in the data setting method of the present invention. It is a figure which shows an example of a table. ■ - Digital signal processing circuit, 2 - Counter, 3 - Write/read memory (RAM), 4 = - Setting data output circuit, 5 - Read only memory (ROM) Patent applicant
Fujitsu Co., Ltd. Agent Patent Attorney Gobe Tamamushi (1 other person) Figure 1 Figure 2 Figure 4 Figure 3

Claims (1)

[Claims] Read-only memory of external data setting circuit (j22 lower R
In a data setting method that sets data read from a read/write memory (hereinafter referred to as RAM) of a digital signal processing device, the digital signal processing device is provided with a counter that increments by 1 every processing cycle, and the counter is A data setting method characterized in that data is read word by word from the ROM in accordance with a count value and stored in the RAMI in accordance with the count value.