JPS6017563A - バタフライ演算回路 - Google Patents

バタフライ演算回路

Info

Publication number
JPS6017563A
JPS6017563A JP58125345A JP12534583A JPS6017563A JP S6017563 A JPS6017563 A JP S6017563A JP 58125345 A JP58125345 A JP 58125345A JP 12534583 A JP12534583 A JP 12534583A JP S6017563 A JPS6017563 A JP S6017563A
Authority
JP
Japan
Prior art keywords
data
butterfly
register
address
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58125345A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0516618B2 (enrdf_load_html_response
Inventor
Ryohei Kato
良平 加藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP58125345A priority Critical patent/JPS6017563A/ja
Publication of JPS6017563A publication Critical patent/JPS6017563A/ja
Publication of JPH0516618B2 publication Critical patent/JPH0516618B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/5443Sum of products

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Computing Systems (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Complex Calculations (AREA)
JP58125345A 1983-07-09 1983-07-09 バタフライ演算回路 Granted JPS6017563A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58125345A JPS6017563A (ja) 1983-07-09 1983-07-09 バタフライ演算回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58125345A JPS6017563A (ja) 1983-07-09 1983-07-09 バタフライ演算回路

Publications (2)

Publication Number Publication Date
JPS6017563A true JPS6017563A (ja) 1985-01-29
JPH0516618B2 JPH0516618B2 (enrdf_load_html_response) 1993-03-04

Family

ID=14907814

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58125345A Granted JPS6017563A (ja) 1983-07-09 1983-07-09 バタフライ演算回路

Country Status (1)

Country Link
JP (1) JPS6017563A (enrdf_load_html_response)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5378744A (en) * 1976-12-23 1978-07-12 Fujitsu Ltd Arithmetic system for complex number

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5378744A (en) * 1976-12-23 1978-07-12 Fujitsu Ltd Arithmetic system for complex number

Also Published As

Publication number Publication date
JPH0516618B2 (enrdf_load_html_response) 1993-03-04

Similar Documents

Publication Publication Date Title
JP3869269B2 (ja) 単一サイクルにおける乗算累算演算の処理
KR100310584B1 (ko) 승산-가산연산을이용한신호처리시스템
JP3750820B2 (ja) パック・データの乗加算演算を実行する装置
KR19990044305A (ko) 압축 데이터에 의한 승산-가산 연산 수행 장치
US5452466A (en) Method and apparatus for preforming DCT and IDCT transforms on data signals with a preprocessor, a post-processor, and a controllable shuffle-exchange unit connected between the pre-processor and post-processor
JP4935619B2 (ja) デジタル信号処理装置
EP0314809A1 (en) Vector processor for processing recurrent equations at a high speed.
US6463451B2 (en) High speed digital signal processor
JPS5862746A (ja) 割算装置
TW508907B (en) Method and apparatus for efficient calculation of cyclic redundancy check
JP2662124B2 (ja) 高速フーリエ変換における信号シーケンス発生方法、装置およびシステム並びに高速フーリエ変換処理装置
US20040128335A1 (en) Fast fourier transform (FFT) butterfly calculations in two cycles
JPS6017563A (ja) バタフライ演算回路
Liu et al. A new hardware realization of high-speed fast Fourier transformers
US20130262819A1 (en) Single cycle compare and select operations
EP1229438B1 (en) Sum of product arithmetic circuit and method
US7847349B2 (en) Single-cycle FFT butterfly calculator
US5034908A (en) Digit-serial transversal filters
US20230133360A1 (en) Compute-In-Memory-Based Floating-Point Processor
US5204962A (en) Processor with preceding operation circuit connected to output of data register
JP2864598B2 (ja) ディジタル演算回路
JPS6016650B2 (ja) 除算装置
JPS60254372A (ja) 積和演算装置
JPH03242725A (ja) 10進乗算回路
JPH0721760B2 (ja) ディジタル演算回路