JPS60171739A - Electronic device - Google Patents

Abstract

PURPOSE:To enhance humidity resistance, and to enable to form a wiring finely at an electronic device having the wiring construction of three layers or more by a method wherein wiring materials and interlayer insulating films are changed corresponding to the respective layers. CONSTITUTION:By forming a first layer wiring 8 according to aluminum containing silicon, junction punch through according to diffusion to silicon like pure aluminum is not generated, and therefore this method can be applied to a high fine transistor. By using a rigid and fine inorganic insulating film such as a CVD-SiO2 film, etc. for a first interlayer insulating film 9 between the first and a second layer alunimum wirings necessitating a fine process, humidity resistance is enhanced. By using an aluminum alloy containing nickel, etc. for the second layer, a third layer wirings 10, 12, corrosion of the grain boundary is removed. By using organic resin such as polyimide resin, etc. for a second and a third interlayer insulating films 11, 13, flattening of the surface can be secured, the disconnection defect of an uppermost part aluminum wiring 12 can be removed, and yield can be enhanced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a multilayer wiring structure in an electronic device, and is mainly directed to an electronic device having a resin-sealed wiring structure of three or more layers.

[Background technology]

As semiconductor integrated circuit devices such as ICs and LSIs become ultra-high-density, wiring becomes multi-layered from two to three or more layers and miniaturized.The moisture resistance of aluminum wiring becomes important to ensure product reliability. This is becoming a problem.

Up until now, the present inventor has developed three layers of aluminum wiring on a substrate, and when using a semiconductor oxide, such as an inorganic glass mainly composed of Sin, as an interlayer insulating film, in order to planarize the upper layer, , but due to sputter damage and sodium (Na) contamination from the target (quartz plate), SiO*/Si
The inventor of the present invention has found that there is a problem in that the properties of the interface deteriorate.

In addition, when using an organic insulator such as polyimide resin as an insulating film between three aluminum wiring layers, the organic insulator has poor moisture resistance against moisture from the resin-sealed molded body, so the aluminum of the wiring The inventors have found that these materials are susceptible to intergranular corrosion, and there is a risk of wire breakage.

[Purpose of the invention]

The present invention has been made to solve the above-mentioned problems, and its purpose is to change the wiring material according to each layer and the interlayer insulating film according to each layer in a wiring structure with three or more layers. It is an object of the present invention to provide a highly reliable electronic device, particularly a semiconductor device, which has improved moisture resistance and allows finer wiring.

The above and other objects and novel features of the present invention will become clear from the description of this specification and the accompanying drawings.

[Summary of the invention]

A summary of typical inventions disclosed in this application is as follows.

That is, in electronic devices, especially semiconductor devices, having a three-layer wiring structure in which aluminum wiring and interlayer insulating films are alternately stacked on the surface of a substrate such as a semiconductor chip, the first layer wiring is made of pure aluminum or aluminum containing silicon. The first layer interlayer insulating film is made of inorganic glass, the second and third layer wiring is made of an alloy of aluminum and other metals such as nickel, and the second and third layer interlayer insulating films are made of inorganic glass. By being made of a resin such as polyimide, it is possible to prevent contamination by external metal ions, improve moisture resistance, and obtain a finer multilayer wiring structure, thereby achieving the above object.

[Embodiment 1] FIG. 1 shows an embodiment of the present invention, and is a partial sectional view of a semiconductor device having a three-layer wiring structure.

1 is a p-type silicon crystal substrate, 2 is an n++ buried layer, 3 is an n-type silicon layer epitaxially grown on the substrate 1, and 4 is an isolation p-type layer.

5 is a p-type diffusion layer which becomes the base of the npn) transistor, 6
Similarly, there is an n+ type scattered layer which becomes an emitter.

7 is a surface oxide film (Sint) used for the base and emitter diffusion masks.

Reference numeral 8 denotes a first layer wiring for low resistance connection to the base emitter, etc., and is made of aluminum containing silicon.

Reference numeral 9 denotes a first-layer glabellar insulating film, which is made of silicon oxide (Sin) produced by CVD (vapor phase chemical deposition) or phosphorus silicate glass (referred to as PSG) produced by CVD.

Reference numeral 10 denotes a second layer wiring, which is made of an aluminum alloy in which nickel or the like is added to aluminum, and a portion thereof is connected to the first layer wiring 8 through a through hole in the first layer insulating film 9 .

Reference numeral 11 denotes a second interlayer insulating film, which is formed by applying a polyimide resin by spin coating and hardening by baking. .

A third layer wiring 12 is made of an aluminum alloy such as aluminum-nickel, and a portion thereof is connected to the second layer wiring through a through hole in the second interlayer insulating film.

Reference numeral 13 denotes a third interlayer insulating film or a protective insulating film made of polyimide resin.

Although not shown in the drawings, a semiconductor device having such a multilayer wiring structure is pellet-bonded onto a lead frame, and a part of the third layer wiring is used as a terminal for wire bonding, and then molded and sealed with an epoxy resin. As a result, a semiconductor device is completed.

[Embodiment 2] FIG. 2 shows another embodiment of the present invention, and is a partial cross-sectional view of a semiconductor device i4 having a three-layer wiring structure and partially having a Schottky barrier. In FIG. 2, the same reference numbers as in FIG. 1 are used for components common to those in the first embodiment described above.

14 is an Eitzleh planar oxide film and an n-type silicon layer 3.
The recessed portions of the surface of the substrate are selectively oxidized.

15 is the collector of n p n t-transistor.
+ type scattering layer CN+ layer).

Reference numeral 16 denotes an electrode (wiring) for a Schottky barrier diode (SBD) used as a clamp diode, which is made of pure aluminum, contacts the n-type silicon layer, and forms a Schottky barrier 17 by annealing. 8
are the emitter (6) and collector (I) of the npn transistor.
Silicon is contained in aluminum in the first layer aluminum wiring which makes low resistance contact. Second layer wiring 10. The third layer wiring 12 is made of an aluminum alloy containing nickel, and the first interlayer insulating film 9 is made of phosphorus silicate glass (PSG).
The second and third layer insulating films 1 are made of inorganic insulating films such as
As in the first embodiment, numerals 1 and 13 are made of organic insulating films such as polyimide.

〔effect〕

According to the present invention described in the embodiments above, the following effects can be obtained.

(1) By forming the first layer wiring with aluminum containing silicon, a shallow junction (for example, a junction depth of 1
．． When used as an emitter electrode with a diameter of 0 μm),
Unlike pure aluminum, there is no junction penetration due to diffusion into silicon, and therefore it can be applied to highly fine transistors.

By using pure aluminum as the +21sBD electrode (wiring), the barrier hide (φB) in the Schottky barrier can be kept small, and a high-performance semiconductor device can be provided.

(3) The first step requires microfabrication. CVD-8i0. The use of hard and dense inorganic insulating films such as It becomes possible to improve the reliability of aluminum wiring and to optimize pn junction characteristics.

(4) By using an aluminum alloy containing nickel or the like for the second and third layer wiring, intergranular corrosion can be eliminated and the reliability of the wiring is improved.

(5) By using an organic resin such as polyimide for the 21st and 3rd interlayer insulating films, a flat surface is ensured, and disconnection defects in the top (third layer) aluminum wiring are eliminated.
Yield can be improved.

(6) According to (11 to (5)) above, the characteristics of the miniaturized semiconductor device can be enhanced and the reliability can be improved.

Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that the present invention is not limited to the above Examples and can be modified in various ways without departing from the gist thereof. Nor.

[Application field]

In the above description, the invention made by the present inventor is mainly applied to the technology for forming multilayer wiring of electronic devices, which is the background field of application, but the invention is not limited thereto.

The present invention is effective when applied to a semiconductor integrated circuit device (IC, LSI) having three or more layers of wiring sealed with resin.

The present invention can be applied to general electronic devices having a multilayer wiring structure of three or more layers.

[Brief explanation of the drawing]

Figure 1 is a partial cross-sectional view of an electronic semiconductor device showing one embodiment of the present invention. Figure 2 is a cross-sectional view of an electronic semiconductor device showing still another embodiment of the present invention. 1-...p-type silicon substrate, 2...n+ buried layer,
3...n-type layer, 4...isolation section, 5...base p-type layer, 6...emitter n
+ type layer, 7... surface oxide film, 8... first layer wiring, 9
...First interlayer insulating film, IO...Second layer wiring, 11.
・Second N interlayer insulating film, 12...Third layer wiring, 13...Third interlayer insulating film (protective film), 14...I planar oxide film, 15...Collector extraction n+ type layer, 16...・SBD
Electrode, 17... Jotsky barrier.

Claims (1)

[Claims] ■ A multilayer wiring structure in an electronic device in which wiring and glabellar insulating films are alternately stacked on a base, wherein the wiring in the lowest layer is made of aluminum or aluminum containing silicon; The insulating film between the eyebrows is made of an inorganic insulator, the wiring above the second layer is made of an alloy of aluminum and another metal, and the interlayer insulating film from the second layer is made of an organic insulator. electronic equipment. 2. The electronic device according to claim 1, wherein the electronic device has a semiconductor chip on which a semiconductor element is formed as a base, multilayer wiring is formed thereon, and the top is sealed with a synthetic resin molded body. . 8. The electronic device according to claim 1 or 2, wherein the inorganic insulator is mainly composed of silicon oxide, and the organic insulator is made of polyimide resin. 4. The electronic device according to claim 1, @2, or 3, wherein the alloy made of aluminum and another metal is an aluminum-nickel alloy. 5. The multilayer wiring structure according to claim 1 or 2 or 3 or @4, wherein the multilayer wiring has three or more layers.