JPS60167551A - 信号処理プロセツサによるデ−タモデム - Google Patents
信号処理プロセツサによるデ−タモデムInfo
- Publication number
- JPS60167551A JPS60167551A JP27298784A JP27298784A JPS60167551A JP S60167551 A JPS60167551 A JP S60167551A JP 27298784 A JP27298784 A JP 27298784A JP 27298784 A JP27298784 A JP 27298784A JP S60167551 A JPS60167551 A JP S60167551A
- Authority
- JP
- Japan
- Prior art keywords
- data
- signal
- circuit
- output
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
- Complex Calculations (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP27298784A JPS60167551A (ja) | 1984-12-26 | 1984-12-26 | 信号処理プロセツサによるデ−タモデム |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP27298784A JPS60167551A (ja) | 1984-12-26 | 1984-12-26 | 信号処理プロセツサによるデ−タモデム |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60167551A true JPS60167551A (ja) | 1985-08-30 |
| JPS645500B2 JPS645500B2 (enrdf_load_stackoverflow) | 1989-01-31 |
Family
ID=17521563
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP27298784A Granted JPS60167551A (ja) | 1984-12-26 | 1984-12-26 | 信号処理プロセツサによるデ−タモデム |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60167551A (enrdf_load_stackoverflow) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4849703A (en) * | 1986-07-15 | 1989-07-18 | Hayes Microcomputer Products, Inc. | Method and apparatus for generating a data sampling clock locked to a baud clock contained in a data signal |
| US4868864A (en) * | 1986-07-15 | 1989-09-19 | Hayes Microcomputer Products, Inc. | Autocorrelating 2400 bps handshake sequence detector |
| US4910474A (en) * | 1986-07-15 | 1990-03-20 | Hayes Microcomputer Products, Inc. | Method and apparatus for generating phase and amplitude modulated signals |
| US5040194A (en) * | 1986-07-15 | 1991-08-13 | Hayes Microcomputer Products, Inc. | Method and apparatus for providing for automatic gain control of incoming signals in a modem |
-
1984
- 1984-12-26 JP JP27298784A patent/JPS60167551A/ja active Granted
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4849703A (en) * | 1986-07-15 | 1989-07-18 | Hayes Microcomputer Products, Inc. | Method and apparatus for generating a data sampling clock locked to a baud clock contained in a data signal |
| US4868864A (en) * | 1986-07-15 | 1989-09-19 | Hayes Microcomputer Products, Inc. | Autocorrelating 2400 bps handshake sequence detector |
| US4910474A (en) * | 1986-07-15 | 1990-03-20 | Hayes Microcomputer Products, Inc. | Method and apparatus for generating phase and amplitude modulated signals |
| US5040194A (en) * | 1986-07-15 | 1991-08-13 | Hayes Microcomputer Products, Inc. | Method and apparatus for providing for automatic gain control of incoming signals in a modem |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS645500B2 (enrdf_load_stackoverflow) | 1989-01-31 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS6242296B2 (enrdf_load_stackoverflow) | ||
| US3789199A (en) | Signal mode converter and processor | |
| US5457805A (en) | Microcomputer enabling high speed execution of product-sum operation | |
| JPH04290122A (ja) | 数値表現変換装置 | |
| EP0164451B1 (en) | An arithmetic processing unit for executing a floating point operation | |
| US5181184A (en) | Apparatus for multiplying real-time 2's complement code in a digital signal processing system and a method for the same | |
| JPS60167551A (ja) | 信号処理プロセツサによるデ−タモデム | |
| JPH0690668B2 (ja) | ファジイ演算装置 | |
| JPS62187933A (ja) | 加減算装置 | |
| JPS6312025A (ja) | 加減算装置 | |
| JPH0357488B2 (enrdf_load_stackoverflow) | ||
| JPH0225924A (ja) | 浮動小数点演算処理装置 | |
| JPH02224019A (ja) | 加減算装置 | |
| JPH02224020A (ja) | 加減算装置 | |
| JP2756175B2 (ja) | デュアルプロセッサ構成dspの符号付与方法 | |
| KR100196520B1 (ko) | 면적 개선을 위한 2의보수 변환 장치 | |
| SU1238064A1 (ru) | Устройство дл извлечени квадратного корн | |
| JPS61138334A (ja) | 10進演算処理装置 | |
| EP0470450A2 (en) | Fine timing recovery for QAM modem receiver | |
| JPS60245046A (ja) | ロジカルシフト演算回路 | |
| JPS59117638A (ja) | 演算装置 | |
| JPS6129020B2 (enrdf_load_stackoverflow) | ||
| JPH01162926A (ja) | データ長可変演算装置 | |
| JPS60167027A (ja) | デイジタル信号処理用演算回路 | |
| JPH06103458B2 (ja) | 処理装置 |